Method for fabricating solder columns for a column grid array package

Abstract

A method for fabricating an electronic device package having a column grid array is disclosed. A column grid array package includes a substrate, an integrated circuit located on a first side of the substrate, and a set of solder columns located on a second side of the substrate. The column grid array package also includes multiple two-tab electronic devices located on the second side of the substrate. The heights of the two-tab electronic devices are substantially identical to the heights of the solder columns.

What is claimed is: 
     
         1 . A method for fabricating an integrated circuit device package having a column grid array, said method comprising:
 loading a plurality of two-tab electronic devices via a first loading template having holes large enough to fit said two-tab electronic devices;   applying solder paste to a surface of said two-tab electronic devices;   loading a plurality of solder columns;   applying solder paste to a surface of said solder columns;   loading a substrate on said surface of said two-tab electronic devices and said surface of said solder columns; and   reflownig said solder paste to join said substrate to said surface of said two-tab electronic devices and said surface of said solder columns.   
     
     
         2 . The method of  claim 1 , wherein the heights of said solder columns range from 0.05 inch to 0.10 inch. 
     
     
         3 . The method of  claim 1 , wherein said two-tab electronic devices are two-tab capacitors.