Multi-stage sampling circuit for a power converter controller

Abstract

An example controller for a power converter includes a track and hold circuit, a sample and hold circuit, and drive logic. The track and hold circuit receives a signal that is representative of an output voltage of the power converter. The track and hold circuit includes a first capacitor that provides a first voltage that tracks the signal and then holds the first voltage. The sample and hold circuit then samples the first voltage that is held on the first capacitor. The sample and hold circuit includes a second capacitor that holds a second voltage representative of the first voltage after a fixed sample period. The second capacitor is larger than that of the first capacitor. The drive logic controlling the first switch to regulate the output of the power converter includes disabling the first switch during an on time of the first switch responsive to the second voltage.

What is claimed is: 
     
         1 . An integrated circuit controller for a power converter, the controller comprising:
 a track and hold circuit to be coupled to receive a signal from a single terminal of the controller, the signal to represent an output voltage of the power converter during at least a portion of an off time of a first switch, wherein the track and hold circuit includes a first capacitor coupled to provide a first voltage that tracks the signal during the portion of the off time of the first switch and holds the first voltage at an end of the portion of the off time;   a sample and hold circuit coupled to the track and hold circuit to sample the first voltage when the first voltage is held on the first capacitor, wherein the sample and hold circuit includes a second capacitor coupled to integrate an output of the first capacitor over a sample period and to hold a second voltage representative of the first voltage after the sample period, wherein the sample period is a fixed time period, and wherein the second capacitor has a capacitance value larger than that of the first capacitor; and   drive logic coupled to the sample and hold circuit and coupled to control the first switch to regulate an output of the power converter, wherein controlling the first switch to regulate the output of the power converter includes disabling the first switch during an on time of the first switch in response to the second voltage.   
     
     
         2 . The controller of  claim 1 , wherein the signal received from the single terminal is not representative of the output voltage of the power converter when the sample and hold circuit samples the first voltage held on the first capacitor. 
     
     
         3 . The controller of  claim 1 , wherein the track and hold circuit further comprises a track and hold switch coupled to the first capacitor, wherein the first voltage tracks when the track and hold switch is enabled and holds when the track and hold switch is disabled. 
     
     
         4 . The controller of  claim 3 , further comprising an adaptive sampling timer coupled to the track and hold circuit to control the track and hold switch. 
     
     
         5 . The controller of  claim 4 , wherein the adaptive sampling timer is adapted to disable the track and hold switch to hold the first voltage on the first capacitor in response to a load condition at the output of the power converter. 
     
     
         6 . The controller of  claim 4 , wherein the sample and hold circuit further comprises a sample and hold switch coupled to the second capacitor, wherein the sample period begins when the sample and hold switch is enabled and the second voltage is held on the second capacitor when the sample and hold switch is disabled. 
     
     
         7 . An integrated circuit controller for a power converter, the controller comprising:
 a track and hold circuit that includes:
 a first buffer coupled to receive a signal from a terminal of the controller, the signal to represent an output of the power converter during at least a portion of an off time of a power switch; 
 a first switch coupled to the first buffer to control whether the track and hold circuit is tracking or holding an output of the first buffer, wherein the first switch is coupled to be enabled during the portion of the off time of the power switch and disabled at an end of the portion of the off time; and 
 a first capacitor coupled to output a first voltage that tracks the output of the first buffer when the first switch is enabled and to output the first voltage that is held on the first capacitor when the first switch is disabled; 
   a sample and hold circuit coupled to the track and hold circuit, wherein the sample and hold circuit includes:
 a second buffer coupled to receive the first voltage output by the first capacitor of the track and hold circuit; 
 a second switch coupled to the second buffer to control whether the sample and hold circuit is sampling or holding the first voltage output by the first capacitor, wherein the second switch is coupled to be enabled for a fixed sample period and disabled at an end of the fixed sample period; and 
 a second capacitor coupled to integrate the output of the second buffer while the second switch is enabled and to hold a second voltage representative of the first voltage when the second switch is disabled, wherein the second capacitor has a capacitance value larger than that of the first capacitor; and 
   drive logic coupled to the sample and hold circuit and coupled to control the power switch to regulate the output of the power converter, wherein controlling the power switch to regulate the output of the power converter includes disabling the power switch during an on time of the power switch in response to the second voltage held on the second capacitor.   
     
     
         8 . The controller of  claim 7 , wherein the signal received from the terminal is not representative of the output of the power converter when the sample and hold circuit samples the first voltage held on the first capacitor. 
     
     
         9 . The controller of  claim 7 , further comprising an adaptive sampling timer coupled to the track and hold circuit to control the first switch. 
     
     
         10 . The controller of  claim 9 , wherein the adaptive sampling timer is configured to vary a time at which the first switch disabled to hold the first voltage on the first capacitor in response to a load condition at the output of the power converter. 
     
     
         11 . The controller of  claim 9 , wherein the adaptive sampling timer is further coupled to the sample and hold circuit to control the second switch, wherein the adaptive sampling timer is configured to vary a time at which the second switch is enabled to begin the fixed sample period in response to a load condition at the output of the power converter. 
     
     
         12 . The controller of  claim 9 , wherein the adaptive sampling timer is configured to enable the first switch such that the first voltage on the first capacitor tracks the output of the first buffer only during the portion of the off time of the power switch. 
     
     
         13 . The controller of  claim 9 , wherein the drive logic is configured to generate a drive signal to control the power switch, wherein the adaptive sampling timer is configured to enable the first switch in response to the drive signal turning off the power switch. 
     
     
         14 . The controller of  claim 13 , wherein the adaptive sampling timer is configured to enable the first switch a fixed delay time after the drive signal turns off the power switch. 
     
     
         15 . The controller of  claim 7 , wherein the track and hold circuit further includes a resistor coupled between the output of the first buffer and the first switch.