US2014203355A1PendingUtilityA1

Field effect transistor and schottky diode structures

Assignee: FAIRCHILD SEMICONDUCTORPriority: Apr 6, 2005Filed: Mar 24, 2014Published: Jul 24, 2014
Est. expiryApr 6, 2025(expired)· nominal 20-yr term from priority
H10P 30/222H10D 8/60H10D 30/668H10D 30/635H10D 30/665H10D 84/146H10D 30/0297H10D 30/0295H10D 30/0293H10D 30/025H10D 64/516H10D 64/256H10D 64/117H10D 62/393H10D 62/151H10D 62/106H10D 84/811H10D 62/155H10D 30/63H10D 64/2527H01L 29/7827
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Claims

Abstract

In accordance with an embodiment a structure can include a monolithically integrated trench field-effect transistor (FET) and Schottky diode. The structure can include a first gate trench extending into a semiconductor region, a second gate trench extending into the semiconductor region, and a source region flanking a side of the first gate trench. The source region can have a substantially triangular shape, and a contact opening extending into the semiconductor region between the first gate trench and the second gate trench. The structure can include a conductor layer disposed in the contact opening to electrically contact the source region along at least a portion of a slanted sidewall of the source region, and the semiconductor region along a bottom portion of the contact opening. The conductor layer can form a Schottky contact with the semiconductor region.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A structure comprising:
 an epitaxial layer disposed on a substrate including silicon carbide;   a gate trench extending into a semiconductor region of a first conductivity type;   a source region of the first conductivity type disposed on a side of the gate trench;   a shield electrode disposed in a bottom portion of the gate trench, the shield electrode being insulated from the semiconductor region by a shield dielectric layer;   a gate electrode disposed over the shield electrode in the gate trench, the gate electrode and the shield electrode having an inter-electrode dielectric layer therebetween;   a dielectric cap disposed over the gate electrode; and   a conductor layer contacting the source region and the semiconductor region such that the conductor layer forms a Schottky contact with the semiconductor region.   
     
     
         2 . The structure of  claim 1 , wherein the source region is a first source region and the gate trench is a first gate trench,
 the structure further comprising:   a second source region disposed on a side of a second gate trench; and   a contact opening extending into the semiconductor region between the first source region and the second source region, the conductor layer contacting the semiconductor region through the contact opening.   
     
     
         3 . The structure of  claim 1 , wherein the source region is a first source region and the gate trench is a first gate trench,
 the structure further comprising:   a second source region disposed on a side of a second gate trench, the semiconductor region being an epitaxial layer extending between the first source region, the second source region, and a substrate of the first conductivity type, the epitaxial layer having a lower doping concentration than the substrate and the source region.   
     
     
         4 . The structure of  claim 1 , wherein the source region includes polysilicon carbide. 
     
     
         5 . The structure of  claim 1 , wherein the source region includes polysilicon. 
     
     
         6 . A structure comprising:
 an epitaxial layer disposed on a substrate including silicon carbide;   a gate trench extending into a semiconductor region of a first conductivity type and terminating within the epitaxial layer;   a gate electrode disposed in the gate trench;   a dielectric material disposed on the gate electrode;   a source region of the first conductivity type disposed on a side of the gate trench, the source region having an upper surface recessed relative to an upper surface of the dielectric material disposed on the gate electrode;   a body region of a second conductivity type extending along a sidewall of the gate trench between the source region and the semiconductor region;   a contact opening extending into the epitaxial layer; and   a conductor layer disposed in the contact opening and electrically contacting the source region, the body region, the epitaxial layer and the semiconductor region, the conductor layer forming a Schottky contact with at least a portion of the semiconductor region and the epitaxial layer.   
     
     
         7 . The structure of  claim 6 , wherein the contact opening extends to a depth below a bottom surface of the body region. 
     
     
         8 . The structure of  claim 6 , further comprising:
 a dielectric spacer between the source region and the conductor layer.   
     
     
         9 . The structure of  claim 6 , wherein the conductor layer electrically contacts the source region along a top surface and a sidewall of the source region. 
     
     
         10 . The structure of  claim 6 , further comprising:
 a gate dielectric lining a sidewall of the gate trench; and   a thick bottom dielectric disposed in a bottom portion of the gate trench below the gate electrode, the thick bottom dielectric being thicker than the gate dielectric.   
     
     
         11 . The structure of  claim 6 , further comprising:
 a shield electrode disposed below the gate electrode, the gate electrode and the shield electrode having a inter-electrode dielectric layer therebetween; and   a shield dielectric insulating the shield electrode from the semiconductor region.   
     
     
         12 . The structure of  claim 6 , wherein the source region includes a polysilicon material. 
     
     
         13 . A structure comprising:
 an epitaxial layer disposed on a substrate including silicon carbide;   a gate trench extending into and terminating within the epitaxial layer;   a gate electrode disposed in the gate trench;   a dielectric material disposed on the gate electrode;   a source region having at least a portion disposed on a side of the gate trench;   a contact opening extending into the epitaxial layer; and   a conductor layer disposed in the contact opening and electrically contacting the source region and the epitaxial layer, the conductor layer forming a Schottky contact with the epitaxial layer.   
     
     
         14 . The structure of  claim 13 , wherein the source region has a top surface disposed below a top surface of the dielectric material. 
     
     
         15 . The structure of  claim 13 , wherein the contact opening extends into the epitaxial layer to a depth greater than one half a depth of the gate trench. 
     
     
         16 . The structure of  claim 13 , further comprising a dielectric spacer between the source region and the conductor layer. 
     
     
         17 . The structure of  claim 13 , wherein the conductor layer electrically contacts the source region along a top surface of the source region and along a sidewall of the source region. 
     
     
         18 . The structure of  claim 13 , further comprising:
 a gate dielectric lining a sidewall of the gate trench; and   a thick bottom dielectric disposed on a bottom portion of the gate trench and disposed below the gate electrode, the thick bottom dielectric having a thickness greater than a thickness of the gate dielectric.   
     
     
         19 . The structure of  claim 13 , further comprising:
 a shield electrode disposed below the gate electrode, the gate electrode and the shield electrode having an inter-electrode dielectric layer disposed therebetween; and   a shield dielectric insulating the shield electrode from the epitaxial layer.   
     
     
         20 . The structure of  claim 13 , wherein the source region includes a polysilicon material.

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