US2014202739A1PendingUtilityA1
Printed wiring board having metal layers producing eutectic reaction
Est. expiryMay 2, 2028(~1.8 yrs left)· nominal 20-yr term from priority
H10W 72/20H10W 72/07236H10W 72/016H10W 72/251H10W 70/685H10W 70/66Y10T29/49124Y10T29/49155Y10T29/49128H05K 3/3473Y10T29/49149H05K 2203/072Y10T29/49139Y10T29/49117H05K 1/0298H05K 13/0465H05K 3/3436H05K 2201/10674
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Claims
Abstract
A printed wiring board includes a Cu wiring pattern formed on a substrate. A first metal layer is formed on the Cu wiring pattern. A second metal layer is formed on the first metal layer. The first metal layer has a less reactivity with Cu than the second metal layer. The first metal layer and the second metal layer together cause an eutectic reaction.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A printed wiring board comprising:
a substrate;
a Cu wiring pattern formed over said substrate;
a first metal layer formed on said Cu wiring pattern;
a second metal layer formed on said first metal layer,
wherein said first metal layer has a less reactivity with Cu than said second metal layer, and said first metal layer and said second metal layer together cause an eutectic reaction.
2 . The printed wiring board according to claim 1 , wherein said second metal layer forms an intermetallic compound with Cu, and said first metal layer does not form an intermetallic compound with Cu.
3 . The printed wiring board according to claim 1 , wherein said eutectic reaction is produced in a temperature range from 139° C. to 150° C.
4 . The printed wiring board according to claim 1 , wherein said first metal layer is made of a metal element selected from a group consisting of bismuth, lead, indium and silver or an alloy containing one of bismuth, lead, indium and silver as a major component, and said second metal layer is made of a metal element selected from a group consisting of tin and gold or an alloy containing one of tin and gold as a major component.
5 . The printed wiring board according to claim 1 , wherein said Cu wiring pattern includes a first interface area along an interface between said first metal layer and said Cu wiring layer, the first interface area containing the metal element forming said second metal layer; and said second metal layer includes a second interface area along an interface between said first metal layer and said second metal layer, the second interface area containing Cu.
6 . A manufacturing method of an electronic device, comprising:
placing said electronic device on a printed wiring board according to claim 1 so that terminals of said electronic device are brought into contact with said second metal layer; and reflowing said first and second metal layers to join said terminals of said electronic device to said Cu wiring pattern.Join the waitlist — get patent alerts
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