US2014191332A1PendingUtilityA1

Pfet devices with different structures and performance characteristics

Assignee: GLOBALFOUNDRIES INCPriority: Nov 2, 2011Filed: Mar 13, 2014Published: Jul 10, 2014
Est. expiryNov 2, 2031(~5.3 yrs left)· nominal 20-yr term from priority
H10D 84/8311H10D 84/0128H10D 84/038H10D 62/235H10D 84/83H10B 12/00H10B 12/09H01L 27/108H01L 29/1033H01L 27/088
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Claims

Abstract

Disclosed herein is a device that includes a first PFET transistor formed in and above a first active region of a semiconducting substrate, a second PFET transistor formed in and above a second active region of the semiconducting substrate, wherein at least one of a thickness of the first and second channel semiconductor materials or a concentration of germanium in the first and second channel semiconductor materials are different.

Claims

exact text as granted — not AI-modified
1 - 19 . (canceled) 
     
     
         20 . A device, comprising
 a first PFET transistor formed in and above a first active region of a semiconducting substrate, said first PFET transistor comprising a first layer of channel semiconductor material; and   a second PFET transistor formed in and above a second active region of said semiconducting substrate, said second PFET transistor comprising a second layer of channel semiconductor material, wherein at least one of a thickness of said first and second channel semiconductor materials or a concentration of germanium in said first and second channel semiconductor materials are different.   
     
     
         21 . The device of  claim 20 , wherein said first channel semiconductor material is thicker than said second channel semiconductor material and said concentration of said germanium in said first channel semiconductor material is greater than said concentration of said germanium in said second channel semiconductor material. 
     
     
         22 . The device of  claim 20 , wherein said first channel semiconductor material is thicker than said second channel semiconductor material and said concentration of said germanium in said first channel semiconductor material is less than said concentration of said germanium in said second channel semiconductor material. 
     
     
         23 . The device of  claim 20 , wherein said first channel semiconductor material is thinner than said second channel semiconductor material and said concentration of said germanium in said first channel semiconductor material is greater than said concentration of said germanium in said second channel semiconductor material. 
     
     
         24 . The device of  claim 20 , wherein said first channel semiconductor material is thinner than said second channel semiconductor material and said concentration of said germanium in said first channel semiconductor material is less than said concentration of said germanium in said second channel semiconductor material. 
     
     
         25 . The device of  claim 20 , wherein said concentration of said germanium in said first channel semiconductor material is less than said concentration of said germanium in said second channel semiconductor material. 
     
     
         26 . The device of  claim 20 , wherein said concentration of said germanium in said first channel semiconductor material is greater than said concentration of said germanium in said second channel semiconductor material. 
     
     
         27 . The device of  claim 20 , wherein said first channel semiconductor material is thicker than said second channel semiconductor material. 
     
     
         28 . The device of  claim 20 , wherein said first channel semiconductor material is thinner than said second channel semiconductor material. 
     
     
         29 . The device of  claim 20 , wherein said first and second channel semiconductor materials are comprised of silicon germanium. 
     
     
         30 . The device of  claim 20 , further comprising an embedded DRAM device formed in and above said substrate, said embedded DRAM device having a channel formed in said substrate. 
     
     
         31 . A device, comprising
 a first PFET transistor formed in and above a first active region of a semiconducting substrate, said first PFET transistor comprising a first layer of silicon germanium; and   a second PFET transistor formed in and above a second active region of said semiconducting substrate, said second PFET transistor comprising a second layer of silicon germanium, wherein at least one of a thickness of said first and second layers of silicon germanium or a concentration of germanium in said first and second layers of silicon germanium are different.   
     
     
         32 . The device of  claim 31 , wherein said first layer of silicon germanium is thicker than said second layer of silicon germanium and said concentration of said germanium in said first layer of silicon germanium is greater than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         33 . The device of  claim 31 , wherein said first layer of silicon germanium is thicker than said second layer of silicon germanium and said concentration of said germanium in said first layer of silicon germanium is less than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         34 . The device of  claim 31 , wherein said first layer of silicon germanium is thinner than said second layer of silicon germanium and said concentration of said germanium in said first layer of silicon germanium is greater than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         35 . The device of  claim 31 , wherein said first layer of silicon germanium is thinner than said second layer of silicon germanium and said concentration of said germanium in said first layer of silicon germanium is less than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         36 . The device of  claim 31 , wherein said concentration of said germanium in said first layer of silicon germanium is less than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         37 . The device of  claim 31 , wherein said concentration of said germanium in said first layer of silicon germanium is greater than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         38 . The device of  claim 37 , wherein said first layer of silicon germanium is thicker than said second layer of silicon germanium. 
     
     
         39 . The device of  claim 31 , wherein said first layer of silicon germanium is thinner than said second layer of silicon germanium. 
     
     
         40 . The device of  claim 31 , further comprising an embedded DRAM device formed in and above said substrate, said embedded DRAM device having a channel formed in said substrate. 
     
     
         41 . A device, comprising
 a first PFET transistor formed in and above a first active region of a semiconducting substrate, said first PFET transistor comprising a first layer of silicon germanium; and   a second PFET transistor formed in and above a second active region of said semiconducting substrate, said second PFET transistor comprising a second layer of silicon germanium, wherein a thickness of said first and second layers of silicon germanium are different and a concentration of germanium in said first and second layers of silicon germanium are different.   
     
     
         42 . The device of  claim 41 , wherein said first layer of silicon germanium is thicker than said second layer of silicon germanium and said concentration of said germanium in said first layer of silicon germanium is greater than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         43 . The device of  claim 41 , wherein said first layer of silicon germanium is thicker than said second layer of silicon germanium and said concentration of said germanium in said first layer of silicon germanium is less than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         44 . The device of  claim 41 , wherein said first layer of silicon germanium is thinner than said second layer of silicon germanium and said concentration of said germanium in said first layer of silicon germanium is greater than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         45 . The device of  claim 41 , wherein said first layer of silicon germanium is thinner than said second layer of silicon germanium and said concentration of said germanium in said first layer of silicon germanium is less than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         46 . The device of  claim 41 , wherein said concentration of said germanium in said first layer of silicon germanium is less than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         47 . The device of  claim 41 , wherein said concentration of said germanium in said first layer of silicon germanium is greater than said concentration of said germanium in said second layer of silicon germanium. 
     
     
         48 . The device of  claim 47 , wherein said first layer of silicon germanium is thicker than said second layer of silicon germanium. 
     
     
         49 . The device of  claim 41 , wherein said first layer of silicon germanium is thinner than said second layer of silicon germanium.

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