US2014191244A1PendingUtilityA1
METHOD FOR CONDUCTIVITY CONTROL OF (Al,In,Ga,B)N
Est. expiryFeb 10, 2026(expired)· nominal 20-yr term from priority
Inventors:John F. KaedingHitoshi SatoMichael IzaHirokuni AsamizuHong ZhongSteven P. DenbaarsShuji Nakamura
H10P 14/3466H10P 14/3444H10P 14/3416H10P 14/2926H10P 14/2921H10P 14/24H10P 30/208H10P 30/206H10P 14/20H10P 95/00H10D 62/8503H10D 62/854H10D 62/405H10D 62/815H01L 21/0254H01L 21/2654H01L 29/2003
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Claims
Abstract
A method of controlled p-type conductivity in (Al,In,Ga,B)N semiconductor crystals. Examples include {10 1 1} GaN films deposited on {100} MgAl 2 O 4 spinel substrate miscut in the <011> direction. Mg atoms may be intentionally incorporated in the growing semipolar nitride thin film to introduce available electronic states in the band structure of the semiconductor crystal, resulting in p-type conductivity. Other impurity atoms, such as Zn or C, which result in a similar introduction of suitable electronic states, may also be used.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of fabricating a semipolar or nonpolar III-nitride semiconductor, comprising:
controlling a p-type conductivity of the semipolar or nonpolar III-nitride semiconductor, by controlling a hole concentration and a hole mobility in the semipolar or nonpolar III-nitride semiconductor, wherein the hole concentration is approximately at least 10 percent of an acceptor impurity concentration in the semipolar or nonpolar III-nitride semiconductor.
2 . The method of claim 1 , wherein the III-nitride semiconductor is the semipolar III-nitride semiconductor.
3 . The method of claim 1 , wherein the III-nitride semiconductor is deposited on a miscut substrate, the method further comprising selecting a miscut angle of a miscut substrate, in order to obtain the desired hole concentration and hole mobility.
4 . The method of claim 1 , wherein the III-nitride semiconductor is the nonpolar III-nitride semiconductor.
5 . The method of claim 1 , wherein the fabricating further comprises incorporating dopants either intentionally or unintentionally in the semipolar or nonpolar III-nitride semiconductor.
6 . The method of claim 5 , wherein the doping comprises varying a flow of Cp 2 Mg during doping and the flow is varied between 0 and 0.3 μmol/minute.
7 . The method of claim 5 , further comprising performing a subsequent thermal annealing step, after growing and doping the III-nitride semiconductor, that alters a concentration of unintentional impurity atoms within the III-nitride semiconductor, and results in an improvement in conductivity of the III-nitride semiconductor.
8 . The method of claim 7 , wherein the annealing is to a temperature between 550° C.-850° C.
9 . The method of claim 7 , wherein the annealing is above 800° C. or at a temperature such that the hole mobility is at least 8 cm 2 /V s.
10 . The method of claim 1 , wherein the semipolar or nonpolar III-nitride semiconductor is Gallium Nitride and the hole concentration is 10-100% of the acceptor impurity concentration.
11 . The method of claim 1 , further comprising:
(a) fabricating the semiconductor III-nitride using an acceptor impurity doped semipolar or nonpolar III-nitride semiconductor; and (b) controlling the hole concentration and the hole mobility of the acceptor impurity doped semipolar or nonpolar III-nitride semiconductor, thereby controlling the concentration of the acceptor impurity.
12 . A semipolar or nonpolar III-nitride semiconductor, comprising:
a p-type conductivity based on a controlled hole mobility and a hole concentration in the semipolar or nonpolar III-nitride semiconductor, wherein the hole concentration is approximately at least 10 percent of an acceptor impurity concentration in the semipolar or nonpolar III-nitride semiconductor.
13 . The semiconductor of claim 12 , wherein the III-nitride semiconductor is the nonpolar III-nitride semiconductor.
14 . The semiconductor of claim 12 , wherein the III-nitride semiconductor is the semipolar III-nitride semiconductor.
15 . The semiconductor of claim 14 , wherein the semipolar III-nitride semiconductor comprises Gallium Nitride (GaN).
16 . The semiconductor of claim 15 , wherein the semipolar GaN comprises {10-1-3}, {10-1-1},{10-12}, {20-21}, {10-14}, or {11-22} GaN.
17 . The semiconductor of claim 15 , wherein the semipolar GaN comprises {10-1-3} GaN.
18 . The semiconductor of claim 15 , wherein the semipolar GaN comprises {10-11} GaN.
19 . The semiconductor of claim 12 , wherein the III-nitride semiconductor comprises has the hole mobility of at least 8 cm 2 /V s.
20 . The semiconductor of claim 19 , further comprising a hole mobility of 8-14 cm 2 /V s.
21 . The semiconductor of claim 12 , wherein the III-nitride semiconductor is fabricated using a process comprising:
growing the semipolar or nonpolar III-nitride semiconductor by Metal Organic Chemical Vapor Deposition on a substrate crystal orientation, comprising:
selecting and flowing gas flows chosen from a plurality of nitrogen, hydrogen, ammonia, Trimethylgallium (TMGa), and Trimethylaluminum (TMAl),
setting a pressure between 10 torr and 1000 torr, and
setting a temperature between 400° C. and 1400° C.;
controlling a Cp 2 Mg flow during the growing, thereby doping the semipolar or nonpolar III-nitride semiconductor; and annealing the semipolar or nonpolar III-nitride semiconductor in a hydrogen deficient gas for an anneal time.
22 . The semiconductor of claim 12 , wherein:
the semipolar or nonpolar III-nitride semiconductor is Gallium Nitride, the hole concentration is at least as high as a hole concentration in a semipolar or nonpolar III-nitride semiconductor fabricated using a process comprising:
growing the semipolar or nonpolar III-nitride semiconductor by Metal Organic Chemical Vapor Deposition on a substrate crystal orientation, comprising:
selecting and flowing gas flows chosen from a plurality of nitrogen, hydrogen, ammonia, Trimethylgallium (TMGa), and Trimethylaluminum (TMAl),
setting a pressure between 10 torr and 1000 torr, and
setting a temperature between 400° C. and 1400° C.;
controlling a Cp 2 Mg flow during the growing, thereby doping the semipolar or nonpolar III-nitride semiconductor; and
annealing the semipolar or nonpolar III-nitride semiconductor in a hydrogen deficient gas for an anneal time to a temperature between 550° C.-850° C.
23 . The semiconductor of claim 12 , wherein the semipolar or nonpolar III-nitride semiconductor is Gallium Nitride and the hole concentration is 10-100% of the acceptor impurity concentration.
24 . The semiconductor of claim 12 , wherein the hole concentration is at least 10 18 cm −3 .
25 . A method of fabricating a III-nitride semiconductor, comprising:
doping an acceptor impurity into a nonpolar or semipolar III-nitride semiconductor; and performing a subsequent thermal annealing step, resulting in an improvement in a conductivity of the acceptor impurity doped nonpolar or semipolar III-nitride semiconductor.Join the waitlist — get patent alerts
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