Circuit board and method of manufacturing the same

Abstract

A circuit board includes an inorganic material insulating layer, a first circuit pattern layer formed on a surface of the inorganic material insulating layer, a first build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material, and a second circuit pattern layer formed on a surface of the first build-up insulating layer.

What is claimed is: 
     
         1 . A circuit board comprising:
 an inorganic material insulating layer;   a first circuit pattern layer formed on a surface of the inorganic material insulating layer;   a build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material; and   a second circuit pattern layer formed on a surface of the build-up insulating layers.   
     
     
         2 . The circuit board according to  claim 1 , wherein the inorganic material insulating layer is a glass sheet or a plate glass. 
     
     
         3 . The circuit board according to  claim 2 , further comprising:
 a recess section formed at one region of the inorganic material insulating layer; and   an electronic component at least partially inserted into the recess section and having an external electrode at at least one surface thereof,   wherein the build-up insulating layer covers the electronic components.   
     
     
         4 . The circuit board according to  claim 3 , wherein
 the build-up insulating layer is a first upper build-up insulating layer formed on the inorganic material insulating layer, and   the circuit board further comprises a first lower build-up insulating layer formed under the inorganic material insulating layer.   
     
     
         5 . The circuit board according to  claim 4 , further comprising:
 at least one further build-up layer formed on at least one layer selected from the first upper build-up insulating layer and the first lower build-up insulating layer, wherein the number of build-up layers formed on the first upper build-up insulating layer is different from the number of build-up layers formed on the first lower build-up insulating layer.   
     
     
         6 . The circuit board according to  claim 5 , wherein the external electrode is on a surface of the electronic component that is facing the first upper build-up insulating layer, and
 the number of build-up layers formed on the first upper build-up insulating layer is larger than that of the build-up layers formed on the first lower build-up insulating layer.   
     
     
         7 . The circuit board according to  claim 2 , further comprising:
 a further first circuit pattern layer on the surface of the inorganic material insulating layer so that the circuit board comprises a pair of first circuit pattern layers, each formed on a respective surface of the inorganic material insulating layer, and each electrically connected to the other by a via passing through the inorganic material insulating layer.   
     
     
         8 . The circuit board according to  claim 2 , further comprising, on the build-up insulating layer, at least one further build-up layer. 
     
     
         9 . The circuit board according to  claim 3 , wherein the inorganic material insulating layer comprises:
 a first inorganic material insulating layer having a cavity;   an adhesive layer adhered to a lower surface of the first inorganic material insulating layer; and   a second inorganic material insulating layer adhered to a lower surface of the adhesive layer.   
     
     
         10 . The circuit board according to  claim 2 , further comprising a cavity passing through the inorganic material insulating layer and formed in one region of the inorganic material insulating layer, and
 an electronic component at least partially inserted into the cavity and having an external electrode formed at at least one surface thereof,   wherein the build-up insulating layer covers the electronic component.   
     
     
         11 . The circuit board according to  claim 10 , wherein the electronic component is a capacitor. 
     
     
         12 . A circuit board comprising:
 an inorganic material insulating layer having a cavity or a recess section;   an identification mark formed on a surface of the inorganic material insulating layer;   an electronic component partially inserted into the cavity or the recess section and having an external electrode at at least one surface thereof;   a build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material; and   a second circuit pattern layer formed on a surface of the build-up insulating layer.   
     
     
         13 . The circuit board according to  claim 12 , wherein the inorganic material insulating layer is a glass sheet or plate glass. 
     
     
         14 . The circuit board according to  claim 13 , wherein
 the build-up insulating layer is a first upper build-up insulating layer formed on the inorganic material insulating layer,   the circuit board further comprises a first lower build-up insulating layer formed on the inorganic material insulating layer,   the second circuit pattern layer is a second upper circuit pattern layer formed on an upper surface of the first upper build-up insulating layer,   the circuit board further comprises a second lower circuit pattern layer formed on an upper surface of the first lower build-up insulating layer, and   the second upper circuit pattern layer and the second lower circuit pattern layer are electrically connected by a via passing through the build-up insulating layer and the inorganic material insulating layer.   
     
     
         15 . The circuit board according to  claim 14 , wherein the via passes through the identification mark. 
     
     
         16 . The circuit board according to  claim 14 , wherein the external electrode is electrically connected to any one of the second upper circuit pattern layer and the second lower circuit pattern layer by the via. 
     
     
         17 . The circuit board according to  claim 16 , wherein the external electrode is on a surface of the electronic component that is facing the first upper build-up insulating layer, and
 the number of build-up layers formed on the first upper build-up insulating layer is larger than that of build-up layers formed on the first lower build-up insulating layer.   
     
     
         18 . The circuit board according to  claim 16 , wherein the electronic component is a capacitor. 
     
     
         19 . A method of manufacturing a circuit board, comprising:
 forming a first circuit pattern layer on a surface of an inorganic material insulating layer;   forming a recess section or a cavity in the inorganic material insulating layer;   inserting at least a portion of an electronic component having an external electrode into the recess section or the cavity;   forming a build-up insulating layer formed of an organic material on the inorganic material insulating layer;   forming a via-hole passing through the build-up insulating layer and configured to expose a surface of at least one of the first circuit pattern layer and the external electrode; and   forming a conductive material in the via-hole and forming a second circuit pattern layer on a surface of the build-up insulating layer.   
     
     
         20 . The method of manufacturing the circuit board according to  claim 19 ,
 wherein the forming the recess section or cavity in the inorganic material insulating layer comprises:   forming a resist pattern configured to expose a region at which the recess section or the cavity is to be formed on the inorganic material insulating layer; and   wet-etching the exposed region to form the recess section or the cavity and then removing the resist pattern.   
     
     
         21 . The method of manufacturing the circuit board according to  claim 19 ,
 wherein the build-up insulating layer is a first upper build-up insulating layer formed on the inorganic material insulating layer,   further comprising forming a first lower build-up insulating layer formed under the inorganic material insulating layer,   further comprising forming at least one further build-up layer on either or both of the first upper build-up insulating layer and the first lower build-up insulating layer, and   wherein the number of build-up layers formed on the first upper build-up insulating layer is different from the number of build-up layers formed on the first lower build-up insulating layer.   
     
     
         22 . The method of manufacturing the circuit board according to  claim 19 , wherein the inserting at least the portion of the electronic component having the external electrode into the recess section or the cavity is performed by making the lower surface of the electronic components in contact with the adhesive layer and adhering an added inorganic material insulating layer to the adhesive layer lower surface in a state in which an adhesive layer is adhered to the lower surface of the inorganic material insulating layer having the cavity. 
     
     
         23 . The method of manufacturing the circuit board according to  claim 19 , further comprising performing at least one pre-treatment process selected from surface etching, hardening and opaque processing to the inorganic material insulating layer. 
     
     
         24 . A method of manufacturing a circuit board, comprising:
 forming an identification mark on a surface of an inorganic material insulating layer;   forming a recess section or a cavity in the inorganic material insulating layer;   inserting at least a portion of an electronic component having an external electrode into the recess section or the cavity;   forming a build-up insulating layer formed of an organic material on the inorganic material insulating layer;   forming a via-hole passing through the build-up insulating layer and configured to expose a surface of the external electrode; and   forming a conductive material in the via-hole and forming a second circuit pattern layer on a surface of the build-up insulating layer.   
     
     
         25 . The method of manufacturing the circuit board according to  claim 24 , wherein forming the recess section or the cavity in the inorganic material insulating layer comprises patterning a predetermined region with respect to the identification mark. 
     
     
         26 . The method of manufacturing the circuit board according to  claim 24 , wherein inserting at least the portion of the electronic component having the external electrode into the recess section or the cavity is performed by mounting the electronic component on a predetermined position with respect to the identification mark. 
     
     
         27 . The method of manufacturing the circuit board according to  claim 24 , wherein forming the via-hole passing through the build-up insulating layer and configured to expose a surface of the external electrode comprises forming a via-hole passing through the build-up insulating layer, the identification mark and the inorganic material insulating layer. 
     
     
         28 . The method of manufacturing the circuit board according to  claim 24 ,
 wherein the build-up insulating layer is a first upper build-up insulating layer formed on the inorganic material insulating layer,   further comprising forming a first lower build-up insulating layer formed under the inorganic material insulating layer,   further comprising forming at least one build-up layer on the first upper build-up insulating layer and the first lower build-up insulating layer, and   wherein the number of build-up layers formed on the first upper build-up insulating layer is different from the number of build-up layers formed on the first lower build-up insulating layer.   
     
     
         29 . A circuit board comprising:
 a core substrate comprised of a glass sheet or a plate glass; and   on the core substrate, at least one build-up insulating layer formed of organic material and through which a via connecting circuit patterns at opposite respective ends of the via is disposed.   
     
     
         30 . The circuit board according to  claim 29 ,
 wherein the at least one build-up insulating layer includes:   a first build-up insulating layer on a first surface the core substrate; and   a second build-up insulating layer on a second surface of the core substrate opposite to the first surface,   further comprising:   a first circuit pattern layer on a side of the first build-up insulating layer facing toward the core substrate;   a second circuit pattern layer on a side of the first build-up insulating layer facing away from the core substrate; and   a first via passing through the first build-up insulating layer and electrically connecting the first and second circuit patterns:   a third circuit pattern layer on a side of the first build-up insulating layer facing toward the core substrate;   a fourth circuit pattern layer on a side of the first build-up insulating layer facing away from the core substrate;   a second via passing through the first build-up insulating layer and electrically connecting the third and fourth circuit patterns; and   a third via passing through the core substrate electrically connecting the first and third circuit pattern layers.   
     
     
         31 . The circuit board according to  claim 30 , wherein the first and second build-up insulating layers are in contact with the core substrate. 
     
     
         32 . The circuit board according to  claim 30 ,
 wherein the core substrate has a recess section or cavity,   further comprising:   an electronic component at least partially inserted into the recess section or cavity; and   on each side of the core substrate, at least one further respective build-up insulating layer formed of organic material and through which a via, connecting circuit patterns on opposite respective ends of the via, is disposed.   
     
     
         33 . The circuit board according to  claim 32 , wherein
 the core substrate has a recess section recessed from the first surface, and   the number of build-up layers formed on the first surface of the core substrate is larger than the number of build-up layers formed on the second surface of the core substrate.