Heat-dissipating substrate and fabricating method thereof
Abstract
Embodiments of the invention provide a heat-dissipating substrate and a fabricating method of the heat-dissipating substrate. According to various embodiments, the heat-dissipating substrate includes a plating layer divided by a first insulator formed in a division area. A metal plate is formed on an upper surface of the plating layer and filled with a second insulator at a position corresponding to the division area, with an anodized layer formed on a surface of the metal plate. A circuit layer is formed on the anodized layer which is formed on an upper surface of the metal plate. The heat-dissipating substrate and fabricating method thereof achieves thermal isolation by a first insulator formed in a division area and a second insulator.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A fabricating method of a heat-dissipating substrate, comprising:
(A) forming a plating layer, divided by a plating resist formed in a division area, on a first surface of a metal plate on which an anodized layer is formed; (B) removing the plating resist from the division area, and filling the division area with a first insulator; (C) forming a circuit layer on the anodized layer which is formed on a second surface of the metal plate; and (D) removing the metal plate from an upper portion of the division area, removing the anodized layer from the second surface of the metal plate, and filling removed parts with a second insulator.
2 . The fabricating method as set forth in claim 1 , wherein, at (D), the anodized layer is removed from the first surface of the metal plate, and the second insulator is filled to contact the first insulator.
3 . The fabricating method as set forth in claim 1 , wherein the metal plate is made of aluminum or aluminum alloy, and the anodized layer comprises an aluminum anodized layer.
4 . The fabricating method as set forth in claim 1 , wherein a groove is formed in the plating layer.
5 . The fabricating method as set forth in claim 1 , wherein the plating layer forms an open part therein to have a circuit pattern, and the circuit pattern is electrically connected to the circuit layer through a via hole which is formed through the metal plate.
6 . The fabricating method as set forth in claim 5 , wherein a through hole is formed in the metal plate, and the anodized layer is formed on the metal plate including an inner wall of the through hole, and the via hole is formed in the through hole to be connected to the circuit layer.
7 . The fabricating method as set forth in claim 5 , wherein the open part is filled with a third insulator.Join the waitlist — get patent alerts
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