Structures and Methods to Enhance Copper Metallization

Abstract

Disclosed structures and methods inhibit atomic migration and related capacitive-resistive effects between a metallization layer and an insulator layer in a semiconductor structure. One exemplary structure includes an inhibiting layer between an insulator and a metallization layer. The insulator includes a polymer or an insulating oxide compound. And, the inhibiting layer has a compound formed from a reaction between the polymer or insulating oxide compound and a transition metal, a representative metal, or a metalloid.

1 - 32 . (canceled) 
     
     
         33 . A semiconductor structure comprising:
 an insulator layer with a first predetermined thickness having a first substance;   forming an inhibiting layer on the insulator layer, wherein forming the inhibiting layer includes depositing a second substance on the insulator layer, and wherein forming the inhibiting layer includes reacting the first substance and the second substance to form a compound so as to inhibit undesired atomic migration; and   forming a copper metallization layer consisting essentially of copper on the inhibiting layer with a second predetermined thickness.   
     
     
         34 . The semiconductor structure of  claim 33 , wherein the second predetermined thickness of the copper metallization layer is proportional to the first predetermined thickness of the insulator layer. 
     
     
         35 - 36 . (canceled) 
     
     
         37 . The semiconductor structure of  claim 33  wherein the inhibiting layer includes a layer of aluminum. 
     
     
         38 . The semiconductor structure of  claim 37  wherein the layer of aluminum has a thickness of from about 5 Angstroms to about 40 Angstroms. 
     
     
         39 . The semiconductor structure of  claim 33  wherein the insulator layer is disposed between and physically contacts two contacts. 
     
     
         40 . The semiconductor structure of  claim 39  wherein each of the two contacts comprises titanium silicide. 
     
     
         41 . The semiconductor structure of  claim 39  wherein each of the two contacts comprises tungsten. 
     
     
         42 . The semiconductor structure of  claim 33  wherein the inhibiting layer comprises an alkaline earth metal. 
     
     
         43 . The semiconductor structure of  claim 42  wherein the alkaline earth metal is magnesium.