US2014152278A1PendingUtilityA1

Systems and methods for switched-inductor integrated voltage regulators

Assignee: UNIV COLUMBIAPriority: Aug 26, 2011Filed: Feb 4, 2014Published: Jun 5, 2014
Est. expiryAug 26, 2031(~5.1 yrs left)· nominal 20-yr term from priority
H02M 3/1584G06F 1/06G06F 1/04
52
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Power controller includes an output terminal having an output voltage, at least one clock generator to generate a plurality of clock signals and a plurality of hardware phases. Each hardware phase is coupled to the at least one clock generator and the output terminal and includes a comparator. Each hardware phase is configured to receive a corresponding one of the plurality of clock signals and a reference voltage, combine the corresponding clock signal and the reference voltage to produce a reference input, generate a feedback voltage based on the output voltage, compare the reference input and the feedback voltage using the comparator and provide a comparator output to the output terminal, whereby the comparator output determines a duty cycle of the power controller. An integrated circuit including the power controller is also provided.

Claims

exact text as granted — not AI-modified
1 . A power controller, comprising:
 an output terminal having an output voltage;   at least one clock generator to generate a plurality of clock signals;   a plurality of hardware phases, each hardware phase being coupled to the at least one clock generator and the output terminal and including a comparator, each hardware phase being configured to:
 receive a corresponding one of the plurality of clock signals and a reference voltage; 
 combine the corresponding clock signal and the reference voltage to produce a reference input; 
 generate a feedback voltage based on the output voltage; 
 compare the reference input and the feedback voltage using the comparator; and 
 provide a comparator output to the output terminal, whereby the comparator output determines a duty cycle of the power controller. 
   
     
     
         2 . The power controller of  claim 1 , wherein the plurality of hardware phases comprise four hardware phases. 
     
     
         3 . The power controller of  claim 1 , wherein the plurality of hardware phases comprise unlatched hardware phases. 
     
     
         4 . The power controller of  claim 1 , wherein each of the plurality of clock signals have a different phase. 
     
     
         5 . The power controller of  claim 1 , wherein the reference input comprises a triangle wave potential. 
     
     
         6 . The power controller of  claim 5 , wherein the triangle wave potential is centered at a desired DC output voltage of the power controller. 
     
     
         7 . The power controller of  claim 1 , further comprising a bridge switching node having a bridge switching node voltage, the feedback voltage being further based on the bridge switching node voltage. 
     
     
         8 . The power controller of  claim 7 , wherein the bridge switching node voltage is determined from an inductor current of the bridge switching node. 
     
     
         9 . The power controller of  claim 1 , wherein the comparator is an unlatched continuous comparator. 
     
     
         10 . An integrated circuit chip comprising the power controller of  claim 1 . 
     
     
         11 . The integrated circuit chip of  claim 10 , further comprising one or more network-on-chip coupled to the power controller. 
     
     
         12 . The integrated circuit chip of  claim 11 , wherein the one or more network-on-chip comprises four networks-on-chip, each network-on-chip having 64 cores. 
     
     
         13 . A method comprising:
 for each one of a plurality of hardware phases, each hardware phase being coupled to at least one clock generator and an output terminal and including a comparator:
 receiving a corresponding one of a plurality of clock signals from the at least one clock generator and a reference voltage; 
 combining the corresponding clock signal and the reference voltage to produce a reference input; 
 generating a feedback voltage based on an output voltage from an output terminal; 
 comparing the reference input and the feedback voltage using the comparator; and 
 providing a comparator output to the output terminal, whereby the comparator output determines a duty cycle of a power controller. 
   
     
     
         14 . The method of  claim 13 , further comprising providing the plurality of clock signals, each of the plurality of clock signals having a different phase. 
     
     
         15 . The method of  claim 13 , further comprising providing the reference input, wherein the reference input comprises a triangle wave potential. 
     
     
         16 . The method of  claim 15 , wherein providing the reference input comprises centering the triangle wave potential at a desired DC output voltage of the power controller. 
     
     
         17 . The method of  claim 13 , generating the feedback voltage further comprises generating the feedback voltage based on a bridge switching node voltage from a bridge switching node. 
     
     
         18 . The method of  claim 17 , further comprising determining the bridge switching node voltage from an inductor current of the bridge switching node.

Join the waitlist — get patent alerts

Track US2014152278A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.