Solid-state image pickup device and method of manufacturing same

Abstract

A solid-state image pickup device including: a photoelectric conversion section configured to convert incident light into a signal charge; a transfer transistor configured to read the signal charge from the photoelectric conversion section and transfer the signal charge; and an amplifying transistor configured to amplify the signal charge read by the transfer transistor, wherein a compressive stress film having a compressive stress is formed on the amplifying transistor.

What is claimed is: 
     
         1 . A solid-state imaging device, comprising:
 a semiconductor substrate;   a pixel section having a plurality of pixels in the substrate, each which includes at least one photoelectric conversion portion and an amplifier portion having one or more diffusion layers and a gate electrode; and   for each pixel, a film extending from the gate electrode to each of the diffusion layers.   
     
     
         2 . The solid-state imaging device according to  claim 1 , wherein the film is formed to apply a compressive stress. 
     
     
         3 . The solid-state imaging device according to  claim 1 , wherein each of the pixels includes a transfer portion to transfer a charge generated by the photoelectric conversion portion to a floating diffusion portion. 
     
     
         4 . The solid-state imaging device according to  claim 3 , wherein, for each pixel, the floating diffusion portion connects to the gate electrode of the amplifier portion. 
     
     
         5 . The solid-state imaging device according to  claim 4 , wherein each of the pixels includes a reset transistor portion to reset the floating diffusion. 
     
     
         6 . The solid-state imaging device according to  claim 1 , further comprising a silicide block layer covering the pixel section. 
     
     
         7 . The solid-state imaging device according to  claim 1 , further comprising, for each pixel, a silicide layer formed on the surface of the diffusion layer of the amplifier portion. 
     
     
         8 . The solid-state imaging device according to  claim 1 , further comprising, for each pixel, an isolation portion adjacent to an active region of the amplifier portion. 
     
     
         9 . The solid-state imaging device according to  claim 8 , wherein the isolation portion is a shallow trench isolation structure. 
     
     
         10 . The solid-state imaging device according to  claim 1 , further comprising for each pixel, a side wall having a compressive stress formed on sides of the gate electrode of the amplifying portion. 
     
     
         11 . A method of producing a solid state imaging device, comprising:
 providing a semiconductor substrate;   forming a pixel section having a plurality of pixels in the substrate, each which includes at least one photoelectric conversion portion and an amplifier portion having one or more diffusion layers and a gate electrode; and   for each pixel, forming a film extending from the gate electrode to each of the diffusion layers.   
     
     
         12 . The method of  claim 11 , wherein the film is formed to apply a compressive stress. 
     
     
         13 . The method of  claim 11 , further comprising forming for each of the pixels a transfer portion to transfer a charge generated by the photoelectric conversion portion to a floating diffusion portion. 
     
     
         14 . The method of  claim 3 , wherein the floating diffusion portion connects to the gate electrode of the amplifier portion. 
     
     
         15 . The method of  claim 14 , further wherein each of the pixels includes a reset transistor portion to reset the floating diffusion. 
     
     
         16 . The method of  claim 11 , further comprising forming a silicide block layer covering the pixel section. 
     
     
         17 . The method of  claim 11 , further comprising forming, for each pixel, a silicide layer on the surface of the diffusion layer of the amplifier portion. 
     
     
         18 . The method of  claim 11 , wherein each pixel comprises an isolation portion adjacent to an active region of the amplifier portion. 
     
     
         19 . The method of  claim 18 , wherein the isolation portion is shallow trench isolation structure. 
     
     
         20 . The method of  claim 11 , further comprising forming, for each pixel, a side wall having a compressive stress on sides of the gate electrode of the amplifying portion.