Electronic component embedded substrate and manufacturing method thereof

Abstract

The present invention relates to an electronic component embedded substrate including: a cavity formed in at least one insulating layer provided inside the electronic component embedded substrate; an electronic component having at least a portion inserted in the cavity; and a cavity plating portion formed on a surface of the cavity opposite to at least one surface of the electronic component, and can improve electrical connectivity between an external electrode and a via even when the size of the external electrode of the electronic component is reduced than before.

What is claimed is: 
     
         1 . An electronic component embedded substrate having an electronic component embedded therein, comprising:
 a cavity formed in at least one insulating layer provided inside the electronic component embedded substrate;   an electronic component having at least a portion inserted in the cavity; and   a cavity plating portion formed on a surface of the cavity opposite to at least one surface of the electronic component.   
     
     
         2 . The electronic component embedded substrate according to  claim 1 , wherein an external electrode is provided on a side surface of the electronic component, and further comprising:
 a conductive filling portion formed by filling a conductive material between the cavity plating portion and the external electrode to electrically connect between the cavity plating portion and the external electrode.   
     
     
         3 . The electronic component embedded substrate according to  claim 2 , further comprising:
 a via having one surface in contact with at least one area selected from at least a portion of the external electrode, at least a portion of the conductive filling portion, and at least a portion of the cavity plating portion.   
     
     
         4 . The electronic component embedded substrate according to  claim 3 , wherein the external electrode consists of at least two electrodes provided on a surface of the electronic component to be separated from each other,
 disconnecting portions are formed in the cavity plating portion connected to the electrodes to electrically isolate the electrodes from each other, and   a conductive filling portion is filled between the respective cavity plating portions and the respective electrodes electrically separated by the disconnecting portions.   
     
     
         5 . The electronic component embedded substrate according to  claim 4 , wherein an insulating material is filled in a space between the electrodes, between the disconnecting portions, and between the conductive filling portions. 
     
     
         6 . The electronic component embedded substrate according to  claim 2 , further comprising:
 a metal pattern provided on a surface of the insulating layer and electrically connected to the cavity plating portion; and   a via having one surface in contact with at least one area selected from at least a portion of the external electrode, at least a portion of the conductive filling portion, at least a portion of the cavity plating portion, and at least a portion of the metal pattern.   
     
     
         7 . The electronic component embedded substrate according to  claim 6 , wherein the external electrode consists of at least two electrodes provided on a surface of the electronic component to be separated from each other,
 disconnecting portions are formed in the cavity plating portion connected to the electrodes to electrically isolate the electrodes from each other, and   a conductive filling portion is filled between the respective cavity plating portions and the respective electrodes electrically separated by the disconnecting portions.   
     
     
         8 . The electronic component embedded substrate according to  claim 7 , wherein an insulating material is filled in a space between the electrodes, between the disconnecting portions, and between the conductive filling portions. 
     
     
         9 . The electronic component embedded substrate according to  claim 2 , wherein a plurality of electronic components are inserted in the cavity, and at least two of the plurality of electronic components are connected in parallel. 
     
     
         10 . The electronic component embedded substrate according to  claim 1 , wherein an external electrode is provided on a side surface of the electronic component, and the cavity plating portion and the external electrode are in contact with each other to be electrically connected to each other. 
     
     
         11 . The electronic component embedded substrate according to  claim 10 , further comprising:
 a via having one surface in contact with at least one area selected from at least a portion of the external electrode and at least a portion of the cavity plating portion.   
     
     
         12 . The electronic component embedded substrate according to  claim 11 , wherein the external electrode consists of at least two electrodes provided on a surface of the electronic component to be separated from each other, and disconnecting portions are formed in the cavity plating portion connected to the electrodes to electrically isolate the electrodes from each other. 
     
     
         13 . The electronic component embedded substrate according to  claim 12 , wherein an insulating material is filled in a space between the electrodes and between the disconnecting portions. 
     
     
         14 . The electronic component embedded substrate according to  claim 10 , further comprising:
 a metal pattern provided on a surface of the insulating layer and electrically connected to the cavity plating portion; and   a via having one surface in contact with at least one area selected from at least a portion of the external electrode, at least a portion of the cavity plating portion, and at least a portion of the metal pattern.   
     
     
         15 . The electronic component embedded substrate according to  claim 14 , wherein the external electrode consists of at least two electrodes provided on a surface of the electronic component to be separated from each other, and disconnecting portions are formed in the cavity plating portion connected to the electrodes to electrically isolate the electrodes from each other. 
     
     
         16 . The electronic component embedded substrate according to  claim 15 , wherein an insulating material is filled in a space between the electrodes and between the disconnecting portions. 
     
     
         17 . The electronic component embedded substrate according to  claim 10 , wherein a plurality of electronic components are inserted in the cavity, and at least two of the plurality of electronic components are connected in parallel. 
     
     
         18 . An electronic component embedded substrate in which an electronic component comprising a hexahedral body portion and two external electrodes which cover opposite surfaces of the body portion is embedded, comprising:
 a cavity formed in at least one insulating layer provided inside the electronic component embedded substrate; and   a cavity plating portion formed on a surface of the cavity opposite to the external electrode.   
     
     
         19 . An electronic component embedded substrate comprising:
 a first insulating layer having a first metal pattern on a lower surface and a second metal pattern on an upper surface and comprising a cavity passing through the upper surface and the lower surface;   an electronic component having at least one external electrode on a surface and having at least a portion inserted in the cavity;   a cavity plating portion formed on a surface of the cavity opposite to the external electrode to be electrically connected to at least one of the first metal pattern and the second metal pattern;   a conductive filling portion formed by filling a conductive material between the cavity plating portion and the external electrode;   a second insulating layer for covering exposed surfaces of the first metal pattern, the first insulating layer, the cavity plating portion, the conductive filling portion, and the electronic component;   a first circuit pattern formed on a surface of the second insulating layer; and   a via having one surface in contact with at least one area selected from at least a portion of the external electrode, at least a portion of the conductive filling portion, at least a portion of the cavity plating portion, and at least a portion of the first metal pattern portion in contact with the cavity plating portion, and the other surface in contact with the first circuit pattern.   
     
     
         20 . The electronic component embedded substrate according to  claim 19 , wherein the electronic component has at least two external electrodes formed in separated areas on a surface of the electronic component,
 disconnecting portions are formed in the cavity plating portion connected to the external electrodes to electrically isolate the electrodes from each other, and   the conductive filling portion is filled between the respective cavity plating portions and the respective external electrodes electrically separated by the disconnecting portions.   
     
     
         21 . The electronic component embedded substrate according to  claim 20 , wherein a material of the second insulating layer is filled in a space between the external electrodes, between the disconnecting portions, and between the conductive filling portions. 
     
     
         22 . The electronic component embedded substrate according to  claim 20 , further comprising:
 a fifth via having one surface in contact with at least a portion of the first metal pattern except the portion in contact with the cavity plating portion, and the other surface in contact with at least a portion of the first circuit pattern.   
     
     
         23 . The electronic component embedded substrate according to  claim 20 , further comprising:
 a third insulating layer for covering the exposed surfaces of the first insulating layer, the cavity plating portion, the conductive filling portion, and the electronic component;   a second circuit pattern formed on a surface of the third insulating layer; and   a third via having one surface in contact with at least one area selected from at least a portion of the external electrode, at least a portion of the conductive filling portion, at least a portion of the cavity plating portion, and at least a portion of the second metal pattern portion in contact with the cavity plating portion, and the other surface in contact with the second circuit pattern.   
     
     
         24 . The electronic component embedded substrate according to  claim 23 , wherein at least one of a material of the first insulating layer and a material of the second insulating layer is filled in a space between the external electrodes, between the disconnecting portions, and between the conductive filling portions. 
     
     
         25 . The electronic component embedded substrate according to  claim 23 , further comprising:
 a sixth via having one surface in contact with at least a portion of the second metal pattern except the portion in contact with the cavity plating portion, and the other surface in contact with at least a portion of the second circuit pattern.   
     
     
         26 . A method of manufacturing an electronic component embedded substrate having an electronic component embedded therein, comprising:
 forming a cavity in at least one insulating layer provided inside the electronic component embedded substrate and forming a cavity plating portion by plating a conductive material on a surface of the cavity; and   inserting at least a portion of the electronic component in the cavity.   
     
     
         27 . The method of manufacturing an electronic component embedded substrate according to  claim 26 , further comprising, after the inserting, filling a conductive material in a space between the electronic component and the cavity plating portion. 
     
     
         28 . The method of manufacturing an electronic component embedded substrate according to  claim 26 , wherein the forming a cavity comprises:
 forming a temporary remaining portion in a portion of the area in which the cavity is to be formed by processing a first temporary cavity having a “⊂” shape and a second temporary cavity having a shape symmetrical to the first temporary cavity to face each other while being separated from each other by a predetermined interval;   plating a conductive material on surfaces of the first temporary cavity and the second temporary cavity; and   removing the temporary remaining portion.   
     
     
         29 . The method of manufacturing an electronic component embedded substrate according to  claim 26 , wherein the forming a cavity comprises:
 forming a third temporary cavity in an area except a first projecting portion formed by projecting the insulating layer in the direction of a surface facing one surface of the cavity and a second projecting portion formed to be symmetrical to the first projecting portion on a surface facing the surface on which the first projecting portion is formed;   plating a conductive material on a surface of the third temporary cavity; and   removing portions of the first projecting portion and the second projecting portion.   
     
     
         30 . A method of manufacturing an electronic component embedded substrate, comprising:
 providing a first insulating layer having a first metal pattern on a lower surface and a second metal pattern on an upper surface;   forming a cavity in the first insulating layer and forming a cavity plating portion electrically connected to at least one of the first metal pattern and the second metal pattern by plating a conductive material on a surface of the cavity;   attaching a detach film to a lower surface of the first metal pattern;   attaching a lower surface of an electronic component to the detach film by inserting at least a portion of the electronic component having a plurality of external electrodes on a surface;   forming a conductive filling portion by filling a conductive material between the cavity plating portion and the external electrodes;   forming a third insulating layer by applying an insulating material on exposed surfaces of the second metal pattern, the first insulating layer, the cavity plating portion, the conductive filling portion, and the electronic component;   processing a via hole, which exposes at least one area selected from at least a portion of the external electrodes, at least a portion of the conductive filling portion, at least a portion of the cavity plating portion, and at least a portion of the second metal pattern portion in contact with the cavity plating portion, through the third insulating layer; and   filling a conductive material in the via hole and forming a second circuit pattern on an upper surface of the third insulating layer.   
     
     
         31 . The method of manufacturing an electronic component embedded substrate according to  claim 30 , wherein the forming a cavity comprises:
 forming a temporary remaining portion in a portion of the area in which the cavity is to be formed by processing a first temporary cavity having a “⊂”, shape and a second temporary cavity having a shape symmetrical to the first temporary cavity to face each other while being separated from each other by a predetermined interval;   plating a conductive material on surfaces of the first temporary cavity and the second temporary cavity; and   removing the temporary remaining portion.   
     
     
         32 . The method of manufacturing an electronic component embedded substrate according to  claim 30 , wherein the forming a cavity comprises:
 forming a third temporary cavity in an area except a first projecting portion formed by projecting the insulating layer in the direction of a surface facing one surface of the cavity and a second projecting portion formed to be symmetrical to the first projecting portion on a surface facing the surface on which the first projecting portion is formed;   plating a conductive material on a surface of the third temporary cavity; and   removing portions of the first projecting portion and the second projecting portion.   
     
     
         33 . A method of manufacturing an electronic component embedded substrate, comprising:
 providing a first insulating layer having a first metal pattern on a lower surface and a second metal pattern on an upper surface;   forming a cavity in the first insulating layer and forming a cavity plating portion electrically connected to at least one of the first metal pattern and the second metal pattern by plating a conductive material on a surface of the cavity;   attaching a detach film to a lower surface of the first metal pattern;   attaching a lower surface of an electronic component to the detach film by inserting at least a portion of the electronic component having a plurality of external electrodes on a surface;   forming a conductive filling portion by filling a conductive material between the cavity plating portion and the external electrodes;   forming a third insulating layer by applying an insulating material on exposed surfaces of the second metal pattern, the first insulating layer, the cavity plating portion, the conductive filling portion, and the electronic component;   forming a second insulating layer by applying an insulating material on the exposed surfaces of the first metal pattern, the first insulating layer, the cavity plating portion, the conductive filling portion, and the electronic component after removing a detach film;   forming a first via passing through the second insulating layer and a first circuit pattern provided on a lower surface of the second insulating layer to be connected to the first via; and   forming a third via passing through the third insulating layer and a second circuit pattern provided on an upper surface of the third insulating layer to be connected to the third via, wherein one surface of the first via is in contact with at least one area selected from at least a portion of the external electrodes, at least a portion of the conductive filling portion, at least a portion of the cavity plating portion, and at least a portion of the first metal pattern portion in contact with the cavity plating portion, and   one surface of the third via is in contact with at least one area selected from at least a portion of the external electrodes, at least a portion of the conductive filling portion, at least a portion of the cavity plating portion, and at least a portion of the second metal pattern portion in contact with the cavity plating portion.   
     
     
         34 . The method of manufacturing an electronic component embedded substrate according to  claim 33 , wherein the attaching a lower surface of an electronic component is performed to attach the lower surface of the electronic component to the detach film by inserting a plurality of electronic components in the cavity. 
     
     
         35 . The method of manufacturing an electronic component embedded substrate according to  claim 34 , wherein at least two of the plurality of electronic components are connected in parallel.