US2014138821A1PendingUtilityA1

Substrate for flip chip bonding and method of fabricating the same

Assignee: SAMSUNG ELECTRO MECHPriority: Jun 10, 2009Filed: Jan 27, 2014Published: May 22, 2014
Est. expiryJun 10, 2029(~2.9 yrs left)· nominal 20-yr term from priority
Y10T29/49147Y10T29/49165H05K 2201/1025H05K 3/243H10W 72/9415H10W 72/07251H10W 72/01255H10W 72/01235H10W 72/952H10W 72/923H10W 72/252H10W 72/242H10W 72/222H10W 72/20H10W 72/012H10W 70/60H10W 72/019H10W 90/701H05K 3/3436H05K 3/3485Y02P70/50H01L 23/49811
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Claims

Abstract

Disclosed herein is substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A substrate for flip chip bonding, comprising:
 a base substrate having a pad;   a solder resist layer formed on the base substrate to expose the pad;   a base solder layer formed on the pad; and   a metal post formed above the base solder layer, the metal post being formed as a substrate contact,   wherein, the base solder layer is provided at the interface of the pad and the metal post, and in area contact with them.   
     
     
         2 . The substrate for flip chip bonding as set forth in  claim 1 , wherein the base substrate is a semiconductor substrate. 
     
     
         3 . The substrate for flip chip bonding as set forth in  claim 1 , wherein a first surface treatment layer is formed between the base solder layer and the metal post, the first surface treatment layer being composed of a nickel plating layer or a nickel alloy plating layer with or without thereon any one selected from among a palladium plating layer, a gold plating layer and sequentially disposed palladium plating layer and gold plating layer. 
     
     
         4 . The substrate for flip chip bonding as set forth in  claim 3 , wherein a first Ni x —Sn y -based intermetallic compound layer is formed at an interface between the base solder layer and the first surface treatment layer. 
     
     
         5 . The substrate for flip chip bonding as set forth in  claim 1 , wherein a solder cap is formed on the metal post. 
     
     
         6 . The substrate for flip chip bonding as set forth in  claim 5 , wherein a second surface treatment layer is formed between the metal post and the solder cap, the second surface treatment layer being composed of a nickel plating layer or a nickel alloy plating layer with or without thereon any one selected from among a palladium plating layer, a gold plating layer and sequentially disposed palladium plating layer and gold plating layer. 
     
     
         7 . The substrate for flip chip bonding as set forth in  claim 6 , wherein a second Ni x —Sn y -based intermetallic compound layer is formed at an interface between the second surface treatment layer and the solder cap. 
     
     
         8 . The substrate for flip chip bonding as set forth in  claim 1 , wherein an outer surface treatment layer is formed on an outer surface of the metal post.

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