US2014132495A1PendingUtilityA1

Module for determining the driving signal timing and a method for driving a liquid crystal display panel

Assignee: SAMSUNG DISPLAY CO LTDPriority: Dec 15, 1999Filed: Jan 22, 2014Published: May 15, 2014
Est. expiryDec 15, 2019(expired)· nominal 20-yr term from priority
Inventors:Sin-Gu Kang
G09G 2310/0289G09G 2300/0408G09G 3/3666G09G 3/3648G09G 2300/0426G09F 9/00G09G 2320/0223G09G 2320/0233G09G 3/3611G02F 1/13452G09G 3/3677
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Claims

Abstract

Disclosed is a gate printed circuit board, a connector-free liquid crystal display (LCD) panel assembly, a driving-signal timing module included in the liquid crystal display (LCD) panel assembly, and a method of driving the liquid crystal display (LCD) panel assembly. According to the present invention, since a separate connector and a gate printed circuit board of a conventional LCD panel is not required for applying a gate-driving signal generated from an external information processing device, a thickness and the number of parts of the LCD device is reduced. Further, when the gate-driving signal is transmitted through the TFT substrate, the voltage V off for maintaining a thin-film transistor (TFT) in a turned-off state is modified so that users may not recognize the imbalance in brightness.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A liquid crystal display panel assembly, comprising:
 an integrated printed circuit board (PCB) which generates a gate-driving signal and a data-driving signal;   a liquid crystal display (LCD) panel which includes a plurality of data lines, a plurality of gate lines, a plurality of pixel electrodes and a plurality of thin-film transistors, the plurality of thin-film transistors connected to the plurality of data lines, the plurality of gate lines and the plurality of pixel electrodes;   a data-driving signal timing module which applies the data-driving signal to the plurality of data lines;   a plurality of gate-driving signal timing modules which applies the gate-driving signal to the plurality of gate lines;   at least one first signal transmitting pattern which is disposed in an inactive display area of the LCD panel and connects the data-driving signal timing module and a gate-driving signal timing module; and   at least one second signal transmitting pattern which is disposed in the inactive display area between adjacent gate-driving signal timing modules and connects the adjacent gate-driving signal timing modules,   wherein the first and second transmitting patterns are different from each other in a thickness and a length, and when a distance between the data-driving signal timing module and a gate-driving signal timing is increased, a resistance of the first and second signal transmitting patterns through which the gate-driving signal is transmitted from the data-driving signal timing module to the gate-driving signal timing module, is increased.   
     
     
         2 . The liquid crystal display panel assembly of  claim 1 , wherein each of the gate-driving signal timing modules comprises:
 a flexible base substrate;   a gate-driving signal input line formed on the base substrate and configured to receive the gate-driving signal;   a gate-driving signal output line formed on the base substrate and configured to output the gate-driving signal;   a gate-driving IC mounted on the base substrate, including an input terminal which is connected to the gate-driving signal input line and an output terminal which is connected to the gate-driving signal output line; and   at least one gate-driving signal transmitting line connected to the adjacent gate-driving signal timing modules.   
     
     
         3 . The liquid crystal display panel assembly of  claim 2 , wherein numbers of the first and second signal transmitting patterns respectively corresponds to a number of the plurality of gate-driving signal timing modules. 
     
     
         4 . The liquid crystal display panel assembly of  claim 2 , wherein the at least one first signal transmitting pattern comprises:
 a (1-1)-th first signal transmitting pattern which is connected to the gate-driving signal input line of a first gate-driving signal timing module adjacent to the data-driving signal timing module; and   a (1-2)-th first signal transmitting pattern which is connected to a first gate-driving signal transmitting line of the first gate-driving signal timing module.   
     
     
         5 . The liquid crystal display panel assembly of  claim 4 , wherein the at least one first signal transmitting pattern further comprises:
 a (1-3)-th first signal transmitting pattern which is connected to a second gate-driving signal transmitting line of the first gate-driving signal timing module.   
     
     
         6 . The liquid crystal display panel assembly of  claim 5 , wherein the at least one second signal transmitting pattern between the first gate-driving signal timing module and a second gate-driving signal timing module adjacent to the first gate-driving signal timing module, comprises:
 a (2-1)-th second signal transmitting pattern which connects the first gate-driving signal transmitting line of the first gate-driving signal timing module and the gate-driving signal input line of the second gate-driving signal timing module; and   a (2-2)-th second signal transmitting pattern which connects the second gate-driving signal transmitting line of the first gate-driving signal timing module and the at least one gate-driving signal transmitting line of the second gate-driving signal timing module.   
     
     
         7 . The liquid crystal display panel assembly of  claim 6 , wherein the at least one second signal transmitting pattern between the second gate-driving signal timing module and a third gate-driving signal timing module adjacent to the second gate-driving signal timing module, connects the at least one gate-driving signal transmitting line of the second gate-driving signal timing module and the gate-driving signal input line of the third gate-driving signal timing module.

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