Semiconductor device and method of manufacturing the same

Abstract

A device isolation region is made of a silicon oxide film embedded in a trench, an upper portion thereof is protruded from a semiconductor substrate, and a sidewall insulating film made of silicon nitride or silicon oxynitride is formed on a sidewall of a portion of the device isolation region which is protruded from the semiconductor substrate. A gate insulating film of a MISFET is made of an Hf-containing insulating film containing hafnium, oxygen and an element for threshold reduction as main components, and a gate electrode that is a metal gate electrode extends on an active region, the sidewall insulating film and the device isolation region. The element for threshold reduction is a rare earth or Mg when the MISFET is an n-channel MISFET, and the element for threshold reduction is Al, Ti or Ta when the MISFET is a p-channel MISFET.

What is claimed is: 
     
         1 . A semiconductor device provided with a MISFET, the semiconductor device comprising:
 a semiconductor substrate;   a trench for device isolation formed in the semiconductor substrate;   a device isolation region which is made of a silicon oxide film embedded in the trench for device isolation and whose upper portion is protruded from the semiconductor substrate;   a sidewall insulating film which is formed on a sidewall of a portion of the device isolation region protruded from the semiconductor substrate and is made of silicon nitride or silicon oxynitride;   a gate insulating film of the MISFET which is formed on an active region of the semiconductor substrate defined by the device isolation region and is made of a first insulating film containing hafnium, oxygen and a first element as main components; and   a metal gate electrode of the MISFET which is formed on the active region of the semiconductor substrate via the gate insulating film,   wherein, when the MISFET is an n-channel MISFET, the first element is an element belonging to any of Group 1, Group 2 and Group 3,   wherein, when the MISFET is a p-channel MISFET, the first element is any of Al, Ti and Ta,   wherein the metal gate electrode partially extends on the device isolation region,   wherein the sidewall insulating film is interposed between the gate insulating film located between the gate electrode and the active region of the semiconductor substrate and the device isolation region, and   wherein the first insulating film is also formed on the sidewall insulating film and on the device isolation region.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein, when the MISFET is an n-channel MISFET, the first element is a rare earth element or Mg, and   wherein, when the MISFET is a p-channel MISFET, the first element is Al.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein, when the MISFET is an n-channel MISFET, the first element is La, and   wherein, when the MISFET is a p-channel MISFET, the first element is Al.   
     
     
         4 . The semiconductor device according to  claim 3 ,
 wherein the sidewall insulating film is made of silicon nitride.   
     
     
         5 . The semiconductor device according to  claim 2 ,
 wherein the first insulating film is formed between the gate electrode and the active region of the semiconductor substrate, between the gate electrode and the sidewall insulating film and between the gate electrode and the device isolation region.   
     
     
         6 . The semiconductor device according to  claim 5 ,
 wherein the first insulating film has a portion located between the gate electrode and the sidewall insulating film and interposed between a portion located between the gate electrode and the active region of the semiconductor substrate and a portion located between the gate electrode and the device isolation region.   
     
     
         7 . The semiconductor device according to  claim 6 ,
 wherein the metal gate electrode has a stacked structure of a metal film and a silicon film on the metal film.   
     
     
         8 . The semiconductor device according to  claim 2 , further comprising: an interface layer which is formed at an interface between the gate insulating film and the semiconductor substrate and is made of silicon oxide or silicon oxynitride.