Wiring substrate, tape package having the same, and display device having the same

Abstract

A wiring substrate includes a base film, a plurality of first wirings and a plurality of second wirings. The base film has a chip-mounting region configured for mounting a semiconductor chip thereon. The first wirings extend in a first direction from inside the chip-mounting region to outside the chip-mounting region, and include first connection end portions extending in a second direction different from the first direction. The first connection end portions may be formed inside the chip-mounting region and configured to electrically connect to the semiconductor chip. The second wirings extend in the first direction from inside the chip-mounting region to outside the chip-mounting region, and include second connection end portions extending in the opposite direction to the second direction in which the first connection end portions extend, and the second connection end portions may be formed inside the chip-mounting region and configured to electrically connect to the semiconductor chip.

What is claimed is: 
     
         1 . A wiring substrate, comprising:
 a flexible base film including a chip-mounting region;   a plurality of first wirings including first connection end portions within the chip-mounting region; and   a plurality of second wirings including second connection end portions within the chip-mounting region,   the first connection end portions and the second connection end portions together forming a V-shape as the first connection end portions and the second connection end portions approach a center of the chip-mounting region.   
     
     
         2 . The wiring substrate of  claim 1 , wherein the first and second wirings extend in a first direction from inside the chip-mounting region, the first connection end portions extend in a second direction different from the first direction, and the second end portions extends in the opposite to the second direction. 
     
     
         3 . The wring substrate of  claim 2 , wherein the first direction is perpendicular to the extending direction of a side of the chip-mounting region. 
     
     
         4 . The wiring substrate of  claim 1 , wherein the first connection end portions of the first wirings are respectively arranged in a plurality of first lines parallel to an extending direction of an edge of the chip-mounting region and the second connection end portions of the second wirings are respectively arranged in a plurality of second lines between the adjacent first connection end portions. 
     
     
         5 . The wiring substrate of  claim 1 , wherein the distance between the first and second connection end portions that are closer to an edge of the chip-mounting region is smaller than the distance between the first and second connection end portions that are closer to the center of the chip-mounting region. 
     
     
         6 . The wring substrate of  claim 1 , wherein a size of the first and second connection end portions that are closer to the edge of the chip-mounting region is smaller than a size of the first and second connection end portions that are closer to the center of the chip-mounting region. 
     
     
         7 . A tape package, comprising:
 a base film including a chip-mounting region; and   a semiconductor chip mounted to the chip-mounting region, the semiconductor chip including a plurality of bumps formed on the semiconductor chip,   wherein the plurality of bumps include first bumps adjacent an edge of the chip-mounting region and second bumps not adjacent an edge of the chip-mounting region, and   wherein the plurality of bumps form a V-shape as the plurality of bumps approach a center of the chip-mounting region.   
     
     
         8 . The tape package of  claim 7 , wherein the second bumps are larger than the first bumps. 
     
     
         9 . The tape package of  claim 7 , further comprising;
 a plurality of first wirings including first connection end portions within the chip-mounting region; and   a plurality of second wrings including second connection end portions within the chip-mounting region,   the first bumps adhered to the first and second connection end portions respectively arranged closer to the side of the chip-mounting region than the second bumps, and the second bumps adhered to the first and second connection end portions arranged in the lines further from the side of the chip-mounting region than the first bumps.   
     
     
         10 . The tape package of  claim 9 , wherein the first bump has a first size and the second bump has a second size greater than the first size. 
     
     
         11 . A flexible tape package, comprising:
 a flexible base film including a chip-mounting region;   a plurality of first wirings including a plurality of first connection end portions within the chip-mounting region; and   a plurality of second wirings including a plurality of second connection end portions within the chip-mounting region,   a size of the plurality of first connection end portions and a size of the plurality of second connection end portions being smaller closer to an edge of the chip-mounting region than a size of the plurality of first connection end portions and the size of the plurality of second connection end portions that are closer to a center of the chip-mounting region.   
     
     
         12 . The flexible tape package of  claim 11 , wherein the first and second wirings extend in a first direction from inside the chip-mounting region, the first connection end portions extend in a second direction different from the first direction, and the second end portions extends in the opposite to the second direction. 
     
     
         13 . The flexible tape package of  claim 12 , wherein the first direction is perpendicular to the extending direction of a side of the chip-mounting region. 
     
     
         14 . The flexible tape package of  claim 11 , wherein the first connection end portions of the first wirings are respectively arranged in a plurality of first lines parallel to an extending direction of an edge of the chip-mounting region and the second connection end portions of the second wirings are respectively arranged in a plurality of second lines between the adjacent first connection end portions. 
     
     
         15 . The flexible tape package of  claim 11 , wherein the first connection end portions and the second connection end portions together forms a V-shape as the first connection end portions and the second connection end portions approach the center of the chip-mounting region. 
     
     
         16 . The flexible tape package of  claim 11 , further comprising:
 a semiconductor chip mounted to the chip-mounting region, the semiconductor chip including a plurality of bumps formed on the semiconductor chip.   
     
     
         17 . The flexible tape package of  claim 16 , wherein the bumps comprise:
 a plurality of first wirings including first connection end portions within the chip-mounting region; and   a plurality of second wrings including second connection end portions within the chip-mounting region,   the first bumps adhered to the first and second connection end portions respectively arranged closer to the side of the chip-mounting region than the second bumps, and the second bumps adhered to the first and second connection end portions arranged in the lines further from the side of the chip-mounting region than the first bumps.   
     
     
         18 . The tape package of  claim 17 , wherein the first bump has a first size and the second bump has a second size greater than the first size. 
     
     
         19 . A tape package, comprising:
 a base film including a chip-mounting region;   a semiconductor chip mounted to the chip-mounting region, the semiconductor chip including a plurality of bumps formed on the semiconductor chip; and   a bonding region formed between the base film and the semiconductor chip,   the plurality of bumps including first bumps adjacent an edge of the chip-mounting region and second bumps not adjacent an edge of the chip-mounting region, the plurality of bumps forming an outward taper shape as the plurality of bumps approach a center of the chip-mounting region.   
     
     
         20 . The tape package of  claim 19 , wherein the first bumps are smaller than the second bumps.