Semiconductor device having data bus

Abstract

A semiconductor device is disclosed which comprises a first wiring layer, a second wiring layer formed over the first wiring layer, data input/output terminals, and a data bus formed in the first and second wiring layers. The data bus includes N data lines transmitting data between a predetermined circuit and the input/output terminals. M first data lines among the N data lines have a length shorter than a predetermined length and residual N-M second data lines have a length longer than the predetermined length. Shield lines adjacent to the N data lines are formed in the first and second layers. The N data lines are arranged at positions at which the data lines do not overlap one another in a stacking direction of the first and second wiring layers.

1 . A semiconductor device comprising:
 a first wiring layer;   a second wiring layer formed over the first wiring layer;   a plurality of data input/output terminals inputting/outputting data;   a data bus formed in the first and second wiring layers, the data bus including N (N is an integer greater than 1) data lines through which data is transmitted between a predetermined circuit and the plurality of data input/output terminals, the N data lines comprising M (M is an integer satisfying M<N) first data lines and remaining N-M second data lines, each of the M first data lines having a length shorter than a predetermined length, each of the N-M second data lines having a length longer than the predetermined length;   a plurality of shield lines each being adjacent to each of the N data lines formed in the first and second layers; and   the N data lines arranged at positions at which the data lines do not overlap one another in a stacking direction of the first and second wiring layers.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the M first data lines are arranged in the first wiring layer, and the M-N second data lines are arranged in the second wiring layer. 
     
     
         3 . The semiconductor device according to  claim 2 , wherein each of the second data lines is formed with a width wider than that of the first data lines. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the plurality of shield lines include a shield line facing one of the data lines in a stacking direction, and a shield line facing at least two of the data lines in a stacking direction. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the plurality of shield lines include one or more shield lines coupled to a fixed potential. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein widths of the data lines and the shield lines, and gaps between adjacent ones of pairs of the data lines and the shield lines, are set so that coupling capacitance between each of the pairs of the N data lines does not exceed a predetermined value. 
     
     
         7 . The semiconductor device according to  claim 4 , wherein widths of the data lines and the shield lines, and gaps between adjacent ones of pairs of the data lines and the shield lines, are set so that the data lines have time constants each obtained by multiplying wiring resistance and wiring capacitance are equal to one another. 
     
     
         8 . A semiconductor device comprising:
 a multilevel wiring structure including a first-level wiring layer, a second-level wiring layer and an interlayer insulating film between the first-level and second-level wiring layers;   first, second and third data lines extending in substantially parallel to one another, the second data line being between the first and second data lines, the second data line being formed as one of the first-level and second-level wiring layers, and each of the first and second data line being formed as the other of the first-level and second-level wiring layers; and   first and second shielding lines, the first shielding line being formed as the one of the first-level and second-level wiring layers and extending in substantially parallel to the second data line, and the second shield line being formed as the other of the first-level and second-level wiring layers and being between the first and third data lines in substantially parallel thereto.   
     
     
         9 . The device as claimed in  claim 8 , further comprising a fourth data line that is between the first and second data lines and extending in substantially parallel thereto, the fourth data line being formed as the one of the first-level and second-level wiring layers, the first shielding line being between the second and fourth data lines in substantially parallel thereto. 
     
     
         10 . The device as claimed in  claim 9 , wherein each of the first and third data lines is larger in width than each of the second and fourth data lines. 
     
     
         11 . The device as claimed in  claim 10 , wherein each of the first and third data lines is larger in length than each of the second and fourth data lines. 
     
     
         12 . The device as claimed in  claim 9 , further comprising a fifth data line and third and fourth shield lines, each of the fifth data line and the third shield line being as the other of the first-level and second-level wiring layers, the third shield line being between the first and fifth data lines in substantially parallel thereto, the fourth shield line being formed as the one of the first-level and second-level wiring layers, the fourth data line being between the first and fourth shield lines in substantially parallel thereto. 
     
     
         13 . The device as claimed in  claim 12 , wherein the fourth shield line is expanded in a width thereof such that the fourth shield line overlaps in plan view with each of the first and fifth data lines and the third shield line with an intervention of the interlayer insulating film. 
     
     
         14 . The device as claimed in  claim 13 , wherein a distance between fourth data line and the fourth shield line is greater than a distance between the first data line and the third shield line.