Semiconductor device having boosting circuit

Abstract

A semiconductor device includes a boosting circuit that boosts an internal power supply voltage in a boosting range according to an external power supply voltage, an external voltage-level comparison circuit that compares the external power supply voltage and a predetermined reference voltage, and a variable resistor circuit that includes a variable resistor connected to an output terminal of the boosting circuit. The variable resistor circuit controls a resistance value of the variable resistor based on a comparison result of the external voltage-level comparison circuit.

1 . (canceled) 
     
     
         2 . A method of providing a voltage to an internal circuit of a semiconductor device, said method comprising:
 receiving an external voltage at a power supply terminal of said semiconductor device;   boosting said received voltage; and   supplying said boosted voltage to said internal circuit through a variable resistor circuit serially interconnected between said internal circuit and an output node of a circuit providing said boosting.   
     
     
         3 . The method according to  claim 2 , further comprising controlling a resistance of said variable resistor circuit based on a value of said received external voltage. 
     
     
         4 . The method according to  claim 3 , further comprising controlling said variable resistor circuit resistance by comparing a reference voltage with said received external voltage. 
     
     
         5 . The method according to  claim 4 , wherein said variable resistor comprises a plurality of serially-connected resistors with a corresponding plurality of by-pass switches, said by-pass switches being controlled by a corresponding plurality of comparators each receiving said reference voltage and a voltage from a voltage divider circuit supplied with said received external voltage. 
     
     
         6 . The method according to  claim 4 , wherein said variable resistor comprises a plurality of parallel-connected resistors with a corresponding plurality of by-pass switches, each said by-pass switch connected serially with a respective one of the parallel-connected resistors, said by-pass switches being controlled by a corresponding plurality of comparators each receiving said reference voltage and a voltage from a voltage divider circuit supplied with said received external voltage. 
     
     
         7 . The method according to  claim 6 , wherein said variable resistor further comprises a shunt resistor serially connected to said plurality of parallel-connected resistors and a shunt resistor by-pass switch selectively by-passing said shunt resistor, said method further comprising:
 detecting an amount of current flowing through said variable resistor; and   controlling said shunt resistor by-pass switch based on said current amount detection.   
     
     
         8 . The method according to  claim 7 , further comprising controlling an oscillator used in said boosting, by comparing an output voltage of said variable resistor with a second reference voltage. 
     
     
         9 . The method according to  claim 4 , wherein said comparing a reference voltage with said received external voltage comprises:
 dividing said external voltage into a plurality of serially-interconnected voltages;   inputting each of a divided voltage into one of a plurality of comparators, each said comparator thereby comparing of said divided voltages with said reference voltage; and   controlling by-pass switches of said variable resistor based on outputs of said plurality of comparators.   
     
     
         10 . The method according to  claim 4 , wherein said variable resistor circuit sets a first resistance value for said variable resistor circuit when said comparing indicates a value lower than said reference voltage and sets a second resistance value for said variable resistor circuit when said comparing indicates a higher value, said second resistance value being higher than said first resistance value. 
     
     
         11 . The method according to  claim 3 , further comprising additionally controlling said variable resistor circuit resistance based on an amount of current flowing through the variable resistor circuit. 
     
     
         12 . The method according to  claim 4 , wherein said reference voltage is an expected standard value of said received external voltage. 
     
     
         13 . The method according to  claim 12 , further comprising smoothing said voltage supplied to said internal circuit, using a smoothing capacitor at an output node of said variable resistor circuit. 
     
     
         14 . The method according to  claim 13 , said reference voltage being set to said expected standard value thereby permitting a predetermined minimal size of said smoothing capacitor to used, based upon an amount of ripple in said smoothing capacitor in view of said controlling said resistance of said variable resistor circuit. 
     
     
         15 . A method of providing a voltage to an internal circuit of a semiconductor device with a predetermined controlled amount of ripple, said method comprising:
 providing a reference voltage at least substantially equal to a predetermined standard value of a voltage of an external power supply voltage;   receiving an external voltage at a power supply terminal of said semiconductor device;   boosting said received voltage;   supplying said boosted voltage through a resistor circuit serially interconnected between said internal circuit and an output node of a circuit providing said boosting; and   smoothing a voltage at an output of said resistor circuit,   wherein a resistance of said resistor circuit is controlled based on a comparison with said reference voltage.   
     
     
         16 . The method according to  claim 15 , further comprising additionally controlling said resistor circuit resistance based on an amount of current flowing through the resistor circuit. 
     
     
         17 . The method according to  claim 15 , wherein said resistor circuit comprises a plurality of serially-connected resistors with a corresponding plurality of by-pass switches, said by-pass switches being controlled by a corresponding plurality of comparators each receiving said reference voltage and a voltage from a voltage divider circuit supplied with said received external voltage. 
     
     
         18 . The method according to  claim 15 , wherein said resistor circuit comprises a plurality of parallel-connected resistors with a corresponding plurality of by-pass switches, each said by-pass switch connected serially with a respective one of the parallel-connected resistors, said by-pass switches being controlled by a corresponding plurality of comparators each receiving said reference voltage and a voltage from a voltage divider circuit supplied with said received external voltage. 
     
     
         19 . The method according to  claim 15 , wherein a resistance value of said resistor circuit is set to a first resistance value when said comparing indicates a value lower than said reference voltage and is set to a second resistance value for said resistor circuit when said comparing indicates a higher value, said second resistance value being higher than said first resistance value. 
     
     
         20 . The method according to  claim 15 , further comprising controlling an oscillator used in said boosting, by comparing an output voltage of said resistor circuit with a second reference voltage. 
     
     
         21 . A method of reducing a size of a smoothing capacitor needed to provide an expected voltage to an internal circuit of a semiconductor device, said method comprising:
 receiving an external voltage at a power supply terminal of said semiconductor device;   boosting said received voltage;   supplying said boosted voltage to said internal circuit through a resistor circuit serially interconnected between said internal circuit and an output node of a circuit providing said boosting; and   controlling said resistor circuit resistance by comparing a reference voltage with said received external voltage, wherein said reference voltage is set as at least substantially equal to an expected standard value of said received external voltage.