Semiconductor device having metal gate and manufacturing method thereof

Abstract

A semiconductor device having a metal gate includes a substrate having a plurality of shallow trench isolations (STIs) formed therein, at least a metal gate positioned on the substrate, and at least a pair of auxiliary dummy structures respectively positioned at two sides of the metal gate and on the substrate.

What is claimed is: 
     
         1 . A manufacturing method for a semiconductor device having metal gate, comprising:
 providing a substrate having a plurality of shallow trench isolations (STIs) formed therein and a polysilicon layer formed thereon;   patterning the polysilicon layer to form at least a dummy gate and at least a pair of auxiliary dummy structures, the auxiliary dummy structures being positioned on the STI respectively at two sides of the dummy gate;   forming at least a semiconductor device having the dummy gate on the substrate;   forming a dielectric structure on the substrate; and   removing a portion of the dielectric structure to expose the dummy gate of the semiconductor device and the auxiliary dummy structures.   
     
     
         2 . The manufacturing method for a semiconductor device having metal gate according to  claim 1 , wherein the dummy gate and the auxiliary dummy structure comprise a first spacing width defined therebetween, and the first spacing width is between 0.1 micrometer (μm) and 0.18 μm. 
     
     
         3 . The manufacturing method for a semiconductor device having metal gate according to  claim 1 , wherein the auxiliary dummy structure comprises a width, and the width is between 0.03 μm and 0.1 μm. 
     
     
         4 . The manufacturing method for a semiconductor device having metal gate according to  claim 1 , wherein the dummy gate has a line width, and the line width is larger than 1 micrometer (μm). 
     
     
         5 . The manufacturing method for a semiconductor device having metal gate according to  claim 1 , wherein the auxiliary dummy structure comprises a multiple bar-like structure. 
     
     
         6 . The manufacturing method for a semiconductor device having metal gate according to  claim 5 , wherein the multiple bar-like structure comprises a second spacing width defined therebetween, and the second spacing width is between 0.12 μm and 0.23 μm. 
     
     
         7 . The manufacturing method for a semiconductor device having metal gate according to  claim 1 , wherein the step of forming the semiconductor device further comprises forming a first spacer on sidewalls of the dummy gate, and simultaneously forming a second spacer on sidewalls of the auxiliary dummy structure. 
     
     
         8 . The manufacturing method for a semiconductor device having metal gate according to  claim 1 , wherein the dielectric structure covers the semiconductor device and the auxiliary dummy structures and fills up vacancy between the semiconductor device and the auxiliary dummy structures. 
     
     
         9 . The manufacturing method for a semiconductor device having metal gate according to  claim 8 , wherein the semiconductor device, the dummy gate of the semiconductor device, and the dielectric structure between the semiconductor device and the auxiliary dummy structures are coplanar after removing the portion of the dielectric structure to expose the dummy gate of the semiconductor device and the auxiliary dummy structures. 
     
     
         10 . The manufacturing method for a semiconductor device having metal gate according to  claim 1 , further comprising steps of removing the dummy gate of the semiconductor device and forming a metal gate. 
     
     
         11 . The manufacturing method for a semiconductor device having metal gate according to  claim 10 , wherein the dummy gate comprises a first height, the metal gate comprises a second height, and the second height is substantially equal to the first height.