Nanotube array electronic and opto-electronic devices

Abstract

Carbon nanotube (CNT)-based devices and technology for their fabrication are disclosed. The planar, multiple layer deposition technique and simple methods of change of the nanotube conductivity type during the device processing are utilized to provide a simple and cost effective technology for large scale circuit integration. Such devices as p-n diode, CMOS-like circuit, bipolar transistor, light emitting diode and laser are disclosed, all of them are expected to have superior performance then their semiconductor-based counterparts due to excellent CNT electrical and optical properties. When fabricated on semiconductor wafers, the CNT-based devices can be combined with the conventional semiconductor circuit elements, thus producing hybrid devices and circuits.

1 - 34 . (canceled) 
     
     
         35 . A Complementary Metal Insulator Nanotube circuit comprised of the following elements: dielectric substrate with deposited first and second spatially separated metal layers on which two nanotube arrays are grown, and one of the nanotube arrays is converted into opposite conductivity type, so that one of said nanotube arrays is of p-type, while another one is of n-type; first dielectric layer covering said first and second metal layers, a half length of the nanotubes and partially sidewalls of the nanotubes; third metal layer covering said first dielectric layer and reaching said first dielectric layer on said sidewalls of the nanotubes in both said nanotube arrays; second dielectric layer deposited on top of said third metal layer and making the total thickness of all deposited metal and dielectric layers smaller than the nanotube length, so that the nanotubes protrude above said second dielectric layer; forth metal layer which covers said two nanotubes arrays and is deposited on the second dielectric layer after polishing the surface of said second dielectric layer, to remove the protruded nanotube ends and expose the nanotube tips, so that said forth metal layer connects both said nanotube arrays and thus makes a circuit of two transistors in series, wherein said third metal layer functions as a gate electrode to both transistor in the circuit, while said first dielectric layer deposited on said sidewalls of the nanotubes plays a role of the gate insulator. 
     
     
         36 . The Complementary Metal Insulator Nanotube circuit of claim  1 , wherein the conversion of originally p-type nanotubes into n-type is made by annealing the nanotubes in vacuum, while the conversion of the originally n-type nanotubes into p-type is made by annealing the nanotubes in air. 
     
     
         37 . The Complementary Metal Insulator Nanotube circuit of claim  1 , wherein said first, second and forth metal layers are made from Palladium (Pd) to minimize the contact resistance; 
     
     
         38 . The Nanotube Array Bipolar Transistor comprised of the following elements: dielectric substrate, with deposited first metal layer, on which the nanotube array is grown; first dielectric layer covering the nanotubes up to a half of their length; second dielectric layer deposited after cleaning the nanotube sidewalls and converting the remaining exposed parts of nanotubes into the opposite type of conductivity; second metal layer deposited on said second dielectric layer, said metal layer being connected to the sidewalls of the nanotubes and thus providing electrical contact to the nanotubes in the region of converted conductivity; third dielectric layer covering said second metal layer; forth dielectric layer deposited after reversed conversion of the remaining part of the exposed nanotubes into original type of conductivity, so that only said second and third dielectric layers and sandwich between them said second metal layer are placed within the nanotube region of the converted conductivity, thereby forming contact to the base of the bipolar transistor in the middle of said region of converted conductivity; third metal layer deposited on said forth dielectric layer and the nanotube tips, which became exposed after polishing the forth dielectric layer. 
     
     
         39 . The Nanotube Array Bipolar Transistor of claim  4 , wherein said first, second and third metal layers are made from Pd. 
     
     
         40 . Nanotube Array Light Emitting Diode comprised of the following elements: dielectric substrate with deposited first metal layer on which the nanotube array is grown; first dielectric layer covering the nanotubes up to the middle of the nanotube length; second dielectric layer deposited on the said first dielectric layer after cleaning of the remaining exposed parts of nanotube and converting them into the opposite type of conductivity, thereby forming a p-n junction structure along the nanotubes; third dielectric layer deposited on said second dielectric layer and the nanotubes, the thickness of said third dielectric layer being chosen to be such that the total thickness of all deposited layers is thinner than the nanotube length, so that the nanotube ends protrude above the surface of said third dielectric layer; optically transparent conductive layer deposited on said third dielectric layer after polishing of said third dielectric layer to remove the protruded nanotube ends and expose the nanotube tips. 
     
     
         41 . Nanotube Array Light Emitting Diode of claim  6 , wherein said optically transparent conductive layer is made from ITO. 
     
     
         42 . Nanotube Array Light Emitting Diode of claim  6 , wherein said first metal layer is made from Pd. 
     
     
         43 . Nanotube Array Injection Laser comprised of the following elements: dielectric substrate with the first metal layer on which the nanotube matrix is grown; first dielectric layer deposited on said first metal layer, said first dielectric layer determining the first cladding layer of the laser waveguide; second dielectric layer deposited on said first dielectric layer, said first and second dielectric layers combined have the thickness of a half of the nanotube length, while said second dielectric layer have the refractive index higher than that of the first dielectric layer; third dielectric layer made of the same thickness and material as said second dielectric layer and deposited after cleaning of the remaining exposed half of the nanotube length and conversion of said exposed half of the nanotube length into the opposite type of conductivity, thereby making the p-n junction structure, said second and third dielectric layers forming the core of the waveguide for the laser wave propagation parallel to the substrate plane, and the thickness of said second and third dielectric layers is controlled by the laser wavelength and the refractive index difference of the core and the cladding layers; forth dielectric layer deposited on said third dielectric layer and having thickness and index of refraction of said first dielectric layer, said forth dielectric layer determining the second cladding layer of the waveguide, while the combined thickness of all dielectric layers is slightly smaller than the nanotube length, so that the nanotubes protrude above the surface of said forth dielectric layer; second metal layer deposited on said forth dielectric layer after polishing the surface of said forth dielectric layer to remove the protruded nanotube ends and expose the nanotube tips; two side mirrors with appropriate transparencies, positioned normal to the substrate plane at the ends of the laser bar to create a Fabri-Perrot resonator for the laser action. 
     
     
         44 . Nanotube Array Injection Laser of claim  9 , wherein said first and second metal layers are made from Pd to minimize the contact resistance. 
     
     
         45 . Nanotube Array Injection Laser of claim  9 , wherein said first and forth dielectric layers forming the cladding layers of the waveguide are made from SiO.sub.2, while said second and third dielectric layers, forming the waveguide core, are made from Si.sub.3N.sub.4. 
     
     
         46 . Nanotube Array Injection Laser of claim  9 , in which said two side mirrors are removed to produce a Light Emitting Diode.