Semiconductor package and fabrication method thereof

Abstract

A semiconductor package is provided, which includes: a dielectric layer made of a material used for fabricating built-up layer structures; a conductive trace layer formed on the dielectric layer; a semiconductor chip is mounted on and electrically connected to the conductive trace layer; and an encapsulant formed over the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer. Since a strong bonding is formed between the dielectric layer and the conductive trace layer, the present invention can prevent delamination between the dielectric layer and the conductive trace layer from occurrence, thereby improving reliability and facilitating the package miniaturization by current fabrication methods.

What is claimed is: 
     
         1 . A semiconductor package, comprising:
 a dielectric layer used for fabricating built-up layer structures and having opposite first and second surfaces and a plurality of openings penetrating the first and second surfaces;   a conductive trace layer formed on the first surface of the dielectric layer, wherein the conductive trace layer has a plurality of traces, each of the traces electrically connects a bonding pad and a connection pad, and the connection pads are exposed through the openings of the dielectric layer;   at least a semiconductor chip attached to the first surface of the dielectric layer having a plurality of electrode pads; and   a plurality of bonding wires electrically connecting the electrode pads of the semiconductor chip to the bonding pads of the conductive trace layer.   
     
     
         2 . The semiconductor package of  claim 1 , wherein the dielectric layer is made of a material selected from the group consisting of polyimide, ABF (Ajinomoto Build-up Film), a glass epoxy composite material, a fiber reinforced glass composite material, and a glass ceramic and epoxy composite material. 
     
     
         3 . The semiconductor package of  claim 1 , further comprising a surface treated layer formed on the bonding pads. 
     
     
         4 . The semiconductor package of  claim 1 , further comprising a plurality of solder balls formed at the openings of the dielectric layer. 
     
     
         5 . The semiconductor package of  claim 1 , further comprising an adhesive formed between the dielectric layer and the semiconductor chip. 
     
     
         6 . The semiconductor package of  claim 1 , further comprising an encapsulant formed over the first surface of the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer. 
     
     
         7 . The semiconductor package of  claim 1 , wherein the conductive trace layer further has a die attach pad on which the semiconductor chip is mounted. 
     
     
         8 . The semiconductor package of  claim 7 , wherein the semiconductor chip is electrically connected to the die attach pad. 
     
     
         9 . The semiconductor package of  claim 1 , wherein the bonding pads are formed outside peripheries of the semiconductor chip. 
     
     
         10 . The semiconductor package of  claim 1 , wherein the bonding pads are formed between the connection pads and the semiconductor chip. 
     
     
         11 . A semiconductor package, comprising:
 a dielectric layer used for fabricating built-up layer structures and having opposite first and second surfaces and a plurality of openings penetrating the first and second surfaces;   a conductive trace layer formed on the first surface of the dielectric layer, wherein the conductive trace layer has a plurality of traces, each of the traces electrically connects a bonding pad and a connection pad, and the connection pads are exposed through the openings of the dielectric layer;   a plurality of conductive bumps formed on the respective bonding pads; and   at least a semiconductor chip disposed on the conductive bumps, wherein the semiconductor chip has a plurality of electrode pads electrically connected to the bonding pads through the conductive bumps.   
     
     
         12 . The semiconductor package of  claim 11 , wherein the dielectric layer is made of a material selected from the group consisting of polyimide, ABF (Ajinomoto Build-up Film), a glass epoxy composite material, a fiber reinforced glass composite material, and a glass ceramic and epoxy composite material. 
     
     
         13 . The semiconductor package of  claim 11 , further comprising a surface treated layer formed on the bonding pads. 
     
     
         14 . The semiconductor package of  claim 11 , further comprising a plurality of solder balls formed at the openings of the dielectric layer. 
     
     
         15 . The semiconductor package of  claim 11 , further comprising an adhesive formed between the dielectric layer and the semiconductor chip. 
     
     
         16 . The semiconductor package of  claim 11 , further comprising an encapsulant formed over the first surface of the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer. 
     
     
         17 . A fabrication method of a semiconductor package, comprising the steps of:
 providing a carrier having a dielectric layer formed on a surface thereof, wherein the dielectric layer used for fabricating built-up layer structures;   forming a conductive trace layer on the dielectric layer, wherein the conductive trace layer has a plurality of traces, each of the traces electrically connects a bonding pad and a connection pad;   attaching at least a semiconductor chip to the dielectric layer and electrically connecting the semiconductor chip to the bonding pads;   forming an encapsulant over the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer;   removing the carrier while retaining the dielectric layer on the encapsulant; and   forming a plurality of openings, through which the connection pads are exposed, penetrating the dielectric layer.   
     
     
         18 . The fabrication method of  claim 17 , wherein the carrier is made of metal. 
     
     
         19 . The fabrication method of  claim 17 , wherein the dielectric layer is made of a material selected from the group consisting of polyimide, ABF (Ajinomoto Build-up Film), a glass epoxy composite material, a fiber reinforced glass composite material, and a glass ceramic and epoxy composite material. 
     
     
         20 . The fabrication method of  claim 17 , wherein the conductive trace layer is formed by electroplating. 
     
     
         21 . The fabrication method of  claim 17 , wherein the conductive trace layer further has a die attach pad on which the semiconductor chip is mounted. 
     
     
         22 . The fabrication method of  claim 17 , wherein the semiconductor chip is electrically connected to the bonding pads through bonding wires or conductive bumps. 
     
     
         23 . The fabrication method of  claim 17 , wherein the carrier is removed by etching. 
     
     
         24 . The fabrication method of  claim 17 , further comprising forming a surface treated layer on the bonding pads. 
     
     
         25 . The fabrication method of  claim 17 , further comprising forming a plurality of solder balls at the openings of the dielectric layer. 
     
     
         26 . The fabrication method of  claim 17 , further comprising forming an adhesive between the dielectric layer and the semiconductor chip. 
     
     
         27 . The fabrication method of  claim 17 , further comprising forming an encapsulant over the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer.