US2014082038A1PendingUtilityA1

Passive switched-capacitor filters conforming to power constraint

Assignee: QUALCOMM INCPriority: Feb 5, 2009Filed: Nov 21, 2013Published: Mar 20, 2014
Est. expiryFeb 5, 2029(~2.5 yrs left)· nominal 20-yr term from priority
H03H 15/02H03H 15/023H03H 19/004H03H 17/0248H03H 2007/0192
49
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Claims

Abstract

Passive switched-capacitor (PSC) filters are described herein. In one design, a PSC filter implements a second-order infinite impulse response (IIR) filter with two complex first-order IIR sections. Each complex first-order IIR section includes three sets of capacitors. A first set of capacitors receives a real input signal and an imaginary delayed signal, stores and shares electrical charges, and provides a real filtered signal. A second set of capacitors receives an imaginary input signal and a real delayed signal, stores and shares electrical charges, and provides an imaginary filtered signal. A third set of capacitors receives the real and imaginary filtered signals, stores and shares electrical charges, and provides the real and imaginary delayed signals. In another design, a PSC filter implements a finite impulse response (FIR) section and an IIR section for a complex first-order IIR section. The IIR section includes multiple complex filter sections operating in an interleaved manner.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An apparatus comprising:
 a first complex first-order infinite impulse response (IIR) section operative to receive and filter a complex input signal and provide a complex filtered signal; and   a second complex first-order IIR section coupled to the first complex first-order IIR section and operative to receive and filter the complex filtered signal and provide a complex output signal.   
     
     
         2 . The apparatus of  claim 1 , wherein the first and second complex first-order IIR sections are implemented with first and second passive switched-capacitor (PSC) filter sections, each PSC filter section comprising a plurality of capacitors and a plurality of switches. 
     
     
         3 . The apparatus of  claim 1 , wherein the first complex first-order IIR section is defined by a first complex coefficient and the second complex first-order IIR section is defined by a second complex coefficient, the second complex coefficient being a complex conjugate of the first complex coefficient. 
     
     
         4 . An apparatus comprising:
 a first complex filter section operative to receive and filter a complex input signal and provide a complex output signal every M clock cycles, where M is greater than one; and   a second complex filter section operative to receive and filter the complex input signal and provide the complex output signal every M clock cycles, the first and second complex filter sections being enabled in different clock cycles.   
     
     
         5 . The apparatus of  claim 4 , wherein the first complex filter section is enabled in even-numbered clock cycles and the second complex filter section is enabled in odd-numbered clock cycles. 
     
     
         6 . The apparatus of  claim 4 , wherein the first and second complex filter sections each comprises
 a first set of capacitors operative to receive a real input signal and an imaginary delayed output signal, to store and share electrical charges, and to provide a real output signal,   a second set of capacitors operative to receive an imaginary input signal and a real delayed output signal, to store and share electrical charges, and to provide an imaginary output signal, and   a third set of capacitors operative to receive the real and imaginary output signals, to store and share electrical charges, and to provide the real and imaginary delayed output signals, wherein the complex input signal comprises the real and imaginary input signals, and wherein the complex output signal comprises the real and imaginary output signals.   
     
     
         7 . An apparatus comprising:
 a finite impulse response (FIR) section operative to receive and filter a first complex input signal and provide a first complex output signal, the FIR section comprising a first passive switched-capacitor (PSC) filter section; and   an infinite impulse response (IIR) section coupled to the FIR section and operative to receive and filter a second complex input signal and provide a second complex output signal, the IIR section comprising a second PSC filter section.   
     
     
         8 . The apparatus of  claim 7 , wherein the IIR section is coupled after the FIR section, and wherein the second complex input signal comprises the first complex output signal. 
     
     
         9 . The apparatus of  claim 7 , wherein the FIR section is coupled after the IIR section, and wherein the first complex input signal comprises the second complex output signal. 
     
     
         10 . The apparatus of  claim 7 , wherein the IIR section comprises
 multiple complex filter sections operative to receive and filter the second complex input signal and provide the second complex output signal, the multiple complex filter sections being enabled in different clock cycles.   
     
     
         11 . The apparatus of  claim 7 , wherein the IIR section and the FIR section implement a complex first-order IIR filter.

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