Semiconductor device including buried gate, module and system, and method for manufacturing

Abstract

An embodiment of the semiconductor device includes a recess formed in an active region, a gate buried in a lower part of the recess, a first capping insulation film formed over the gate, a second capping insulation film formed over the first capping insulation film, and a third capping insulation film formed over the second capping insulation film. In the semiconductor device including the buried gate, mechanical stress caused by a nitride film can be reduced by reducing the volume of a nitride film in a capping insulation film formed over a buried gate, and the ratio of silicon to nitrogen of the nitride film is adjusted, so that mechanical stress is reduced, resulting in improvement of operation characteristics of the semiconductor device.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a recess formed in an active region;   a gate buried in a lower part of the recess;   a first capping insulation film formed over the gate;   a second capping insulation film formed over the first capping insulation film; and   a third capping insulation film formed over the second capping insulation film so as to fill the recess.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the first capping insulation film comprises a silicon nitride film having a higher nitrogen ratio than a Si 3 N 4  material. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the first capping insulation film is formed over a sidewall of the recess and over the gate. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the second capping insulation film includes an oxide film in which the first capping insulation film is partially oxidized. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the third capping insulation film comprises a silicon nitride film having a higher nitrogen ratio than a Si 3 N 4  material. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the third capping insulation film includes an oxide film. 
     
     
         7 . The semiconductor device according to  claim 6 , wherein the third capping insulation film includes at least one of a low temperature oxide film and a Plasma Enhanced TEOS (PE-TEOS) oxide film. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein the recess includes a fin structure in which the active region is more protruded than a device isolation film. 
     
     
         9 . A method for forming a semiconductor device comprising:
 forming a device isolation film defining an active region;   forming a recess located in the active region;   forming a gate at a lower part of the recess;   forming a first capping insulation film over the gate;   forming a second capping insulation film over the first capping insulation film; and   forming a third capping insulation film over the second capping insulation film so as to fill the recess.   
     
     
         10 . The method according to  claim 9 , further comprising:
 performing H 2  annealing after forming the recess.   
     
     
         11 . The method according to  claim 9 , wherein forming the first capping insulation film includes:
 depositing a first nitride film at a sidewall of the recess and over the gate.   
     
     
         12 . The method according to  claim 11 , wherein forming the first capping insulation film includes:
 implanting nitrogen into the first nitride film.   
     
     
         13 . The method according to  claim 12 , wherein the implanting comprises:
 implanting the nitrogen ions under a process condition of a dose of between about 1E13/cm 2  to 1E16/cm 2  and an energy of between about 1 KeV to 50 KeV.   
     
     
         14 . The method according to  claim 9 , wherein forming the first capping insulation film comprises:
 forming a silicon nitride film having a higher nitrogen ratio than a Si 3 N 4  material.   
     
     
         15 . The method according to  claim 9 , wherein forming the second capping insulation film comprises:
 converting the first capping insulation film having a predetermined thickness into an oxide film by partially oxidizing the first capping insulation film.   
     
     
         16 . The method according to  claim 9 , wherein forming the second capping insulation film includes:
 partially oxidizing the first capping insulation film by performing an oxidation process on the first capping insulation film.   
     
     
         17 . The method according to  claim 16 , wherein the oxidation process is performed for a predetermined time of between about 10 s˜1000 s at a temperature of between about 500° C.˜1000° C. 
     
     
         18 . The method according to  claim 16 , wherein the oxidation process is performed such that nitrogen of between about 5%˜95% in the capping insulation film is oxidized. 
     
     
         19 . The method according to  claim 9 , wherein forming the third capping insulation film includes:
 forming a second nitride film over the second capping insulation film.   
     
     
         20 . The method according to  claim 19 , wherein forming the third capping insulation film further includes:
 implanting nitrogen in the second nitride film.   
     
     
         21 . The method according to  claim 9 , wherein forming the third capping insulation film includes:
 forming an oxide film over the second capping insulation film.   
     
     
         22 . A semiconductor device comprising:
 a cell array including a plurality of cells coupled to a bit line and a word line;   a sense amplifier coupled to the bit line so as to sense data stored in the cell;   a row decoder coupled to the buried gate so as to generate a signal for turning on or off the cell; and   a column decoder for generating a drive signal used to operate the sense amplifier coupled to the cell selected by the row decoder,   wherein the cell includes,
 a recess in which an active region is etched, 
 a gate buried in a lower part of the recess, 
 a first capping insulation film formed over the gate, 
 a second capping insulation film formed over the first capping insulation film, and 
 a third capping insulation film formed over the second capping insulation film so as to fill the recess. 
   
     
     
         23 . A semiconductor module comprising:
 a plurality of semiconductor devices mounted to a substrate, each of the semiconductor devices including,
 a recess in which an active region is etched, 
 a gate buried at a lower part of the recess, 
 a first capping insulation film formed over the gate, 
 a second capping insulation film formed over the first capping insulation film, and 
 a third capping insulation film formed over the second capping insulation film so as to fill the recess. 
   
     
     
         24 . A semiconductor system comprising:
 a semiconductor module including a plurality of semiconductor devices mounted to a substrate; and   a controller for controlling operations of the semiconductor module,   wherein each of the semiconductor devices includes,
 a recess in which an active region is etched, 
 a gate buried at a lower part of the recess, 
 a first capping insulation film formed over the gate, 
 a second capping insulation film formed over the first capping insulation film, and 
 a third capping insulation film formed over the second capping insulation film so as to fill the recess. 
   
     
     
         25 . A computer system comprising:
 a semiconductor system having at least one semiconductor module; and   a processor for processing data stored in the semiconductor system,   wherein the semiconductor module comprises a plurality of semiconductor devices mounted to a substrate, and   wherein the semiconductor device comprises,
 a recess in which an active region is etched, 
 a gate buried in a lower part of the recess, 
 a first capping insulation film formed over the gate, 
 a second capping insulation film formed over the first capping insulation film, and 
 a third capping insulation film formed over the second capping insulation film so as to fill the recess. 
   
     
     
         26 . A data processing system comprising:
 at least one semiconductor device mounted to a substrate, each of the semiconductor devices comprising,
 a recess in which an active region is etched, 
 a gate buried in a lower part of the recess, 
 a first capping insulation film formed over the gate, 
 a second capping insulation film formed over the first capping insulation film, and 
 a third capping insulation film formed over the second capping insulation film so as to fill the recess. 
   
     
     
         27 . An electronic system comprising:
 at least one data processing system comprising at least one semiconductor device mounted to a substrate and comprising,
 a recess in which an active region is etched, 
 a gate buried in a lower part of the recess, 
 a first capping insulation film formed over the gate, 
 a second capping insulation film formed over the first capping insulation film, and 
 a third capping insulation film formed over the second capping insulation film so as to fill the recess.