Segmented Pillar Layout for a High-Voltage Vertical Transistor

Abstract

In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged.

1 - 36 . (canceled) 
     
     
         37 . An apparatus comprising:
 a plurality of transistor segments arranged on a die, each transistor segment including:
 a pillar of a semiconductor material, the pillar including a drift region that extends in a vertical direction from a top surface down to a substrate, the pillar having a loop shape that extends in first and second lateral directions, the loop shape including a pair of substantially parallel, elongated straight sections connected at opposite ends by respective first and second semi-circular sections; 
 a first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; 
 first and second field plates respectively disposed in the first and second dielectric regions; 
   wherein the transistor segments are arranged into a plurality of sections, the sections being arranged into rows and columns that extend across first and second lateral directions, respectively, of the die, the transistor segments of each section being arranged in an orthogonal relationship relative to the transistor segments of an adjacent section in both the first and second directions.   
     
     
         38 . The apparatus of  claim 37  wherein the pillar further comprises a source region disposed at or near the top surface, and a body region that vertically separates the source region from the drift region. 
     
     
         39 . The apparatus of  claim 37  wherein the second dielectric region is terminated at each end in the first lateral direction in a rounded end. 
     
     
         40 . The apparatus of  claim 37  wherein the first and second field plates are fully insulated from the extended drain region, the first field plate being laterally surrounded by the pillar, and the second field plate laterally surrounding the pillar. 
     
     
         41 . The apparatus of  claim 38  wherein the drift region and the source region are a first conductivity type, and the body region is a second conductivity type. 
     
     
         42 . The apparatus of  claim 41  wherein the substrate is the first conductivity type. 
     
     
         43 . The apparatus of  claim 38  further comprising a gate disposed within the first and second dielectric regions adjacent the body region, the gate being insulated from the body region and the first and second field plates. 
     
     
         44 . The apparatus of  claim 37  wherein the plurality of sections comprise 2N sections, where N is an integer greater than or equal to one. 
     
     
         45 . The apparatus of  claim 38  wherein the source comprises first and second regions separated by a semiconductor region of an opposite conductivity type. 
     
     
         46 . An apparatus comprising:
 a plurality of transistor segments arranged on a die. each transistor segment including:
 a pillar of a semiconductor material, the pillar including a drift region that extends in a vertical direction through the die, the pillar having a loop shape that extends in first and second lateral directions, the loop shape including a pair of substantially parallel, elongated straight sections connected at opposite ends by respective first and second semi-circular sections; 
 a first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; 
 first and second field plates respectively disposed in the first and second dielectric regions; 
   wherein the transistor segments are arranged into a plurality of sections, each section comprising a set of transistor segments arranged with the substantially parallel, elongated straight sections of each transistor segment being in a side-by-side relationship with the second dielectric region of each transistor segment being merged, the transistor segments of each section being arranged in an orthogonal relationship relative to the transistor segments of an adjacent section in both the first and second directions.   
     
     
         47 . The apparatus of  claim 46  wherein the sections extend laterally substantially across a width and a length of the die. 
     
     
         48 . The apparatus of  claim 46  wherein the pillar further comprises a source region disposed near a top surface of the die, and a body region that vertically separates the source region from the drift region. 
     
     
         49 . The apparatus of  claim 48  further comprising a gate disposed within the first and second dielectric regions adjacent the body region, the gate being insulated from the body region and the first and second field plates.