Memory network methods, apparatus, and systems

Abstract

Apparatus and systems may include a first node group include a first network node coupled to a memory, the first network node including a first port, a second port, a processor port, and a hop port. Network node group may include a second network node coupled to a memory, the second network node including a first port, a second port, a processor port, and a hop port, the hop port of the second network node coupled to the hop port of the first network node and configured to communicate between the first network node and the second network node. Network node group may include a processor coupled to the processor port of the first network node and coupled to the processor port of the second network node, the processor configured to access the first memory through the first network node and the second memory through the second network node. Other apparatus, systems, and methods are disclosed.

What is claimed is: 
     
         1 . A system, comprising:
 a first network node disposed in an x-path, the first network node including a first x-path port, a second x-path port, a first processor port, a first hop path port and a second hop path port;   a second network node disposed in a y-path, the second network node including a first y-path port, a second y-path port, a second processor port and a third hop path port and a fourth hop path port;   a third network node disposed in a z-path, the third network node including a first z-path port, a second z-path port, a third processor port and a fifth hop path port and a sixth hop path port; and   a processor coupled to the first network node using the first processor port, coupled to the second network node using the second processor port, and coupled to the third network node using the third processor port;   wherein the first network node is coupled to a first memory, the second network node is coupled to a second memory, and the third network node is coupled to a third memory;   wherein at least one of the first hop path port and the second hop path port are coupled to at least one of the third, fourth, fifth and sixth hop path ports; and   wherein the x-path, the y-path, and the z-path are in different dimensions with respect to each other.   
     
     
         2 . The system of  claim 1 , wherein the first memory includes a NOR flash memory array and the second memory includes a NAND flash memory array. 
     
     
         3 . The system of  claim 1 , wherein at least one of the first, the second, and the third network nodes includes a router. 
     
     
         4 . The system of  claim 1 , wherein at least one of the network dimensions corresponding to the x-path, the y-path, and the z-path is used by at least one Input/Output processor. 
     
     
         5 . The system of  claim 1 , wherein the processor is coupled to the first network node using one or more one links. 
     
     
         6 . The system of  claim 1 , wherein the first network node and the processor is disposed in a single package. 
     
     
         7 . The system of  claim 1 , wherein the first network node, the second network node, the third network node and the processor is arranged as a two-dimensional mesh network. 
     
     
         8 . The system of  claim 1 , wherein the first network node, the second network node, the third network node and the processor is arranged as a hypercube network. 
     
     
         9 . The system of  claim 1 , wherein the first network node, the second network node, the third network node and the processor is arranged as a torus structure. 
     
     
         10 . The system of  claim 1 , wherein the first network node, the second network node, the third network node and the processor is arranged as a Clos network. 
     
     
         11 . A method of routing data for a multi-dimensional memory network:
 receiving at an originating node a request to access a first memory coupled to a destination network node, the request including a plurality of indices corresponding to a plurality of dimensions;   determining at the originating network node whether the request includes a first index associated with a first dimension;   sending the request to another network node along the first dimension, if the request includes a first index; and   sending the request to a hop path, if the request includes a second index associated with a second dimension.   
     
     
         12 . The method of  claim 11 , wherein if the request is provided to the hop path and is unable to proceed to a particular node in a desired dimension, then sending the request to the next node. 
     
     
         13 . The method of  claim 12 , further comprising setting a flag indicating no return to the originating node. 
     
     
         14 . The method of  claim 12 , further comprising setting the flag to indicate no return on a previously used route. 
     
     
         15 . The method of  claim 12 , wherein if the request indicates that the request should flow in a particular dimension of the network, then sending the request to a next node in the particular dimension. 
     
     
         16 . The method of  claim 12 , further comprising routing requests around failed network nodes. 
     
     
         17 . The method of  claim 12 , further comprising routing requests around failed hop paths. 
     
     
         18 . The method of  claim 11 , wherein the minimum path length path between the originating node and the destination node is determined using a Manhattan routing scheme. 
     
     
         19 . The method of  claim 11 , further comprising:
 accessing data from the destination node, wherein if the data is not available at a first node, then the request is automatically sent to a hop path to follow a network path in another dimension until it arrives at destination node.   
     
     
         20 . The method of  claim 18 , further comprising:
 determining the minimum path length between the originating node and the destination node using a last routing dimension in a dimension that corresponds to network node placement.