Dynamic random access memory applied to an embedded display port

Abstract

A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

What is claimed is: 
     
         1 . A dynamic random access memory applied to an embedded display port, the dynamic random access memory comprising:
 a memory core unit for operating in a first predetermined voltage; and   a peripheral circuit unit electrically connected to the memory core unit for operating in a second predetermined voltage, wherein the second predetermined voltage is lower than 1.1V.   
     
     
         2 . The dynamic random access memory of  claim 1 , wherein the first predetermined voltage is lower than 1.1V. 
     
     
         3 . The dynamic random access memory of  claim 2 , further comprising:
 an input/output unit electrically connected to the peripheral circuit unit and the memory core unit for operating in a third predetermined voltage, wherein the third predetermined voltage is lower than 1.1V.   
     
     
         4 . The dynamic random access memory of  claim 1 , wherein the first predetermined voltage is equal to 1.8V±0.1V. 
     
     
         5 . The dynamic random access memory of  claim 4 , further comprising:
 an input/output unit electrically connected to the peripheral circuit unit and the memory core unit for operating in a third predetermined voltage, wherein the third predetermined voltage is lower than 1.1V.   
     
     
         6 . A dynamic random access memory applied to an embedded display port, the dynamic random access memory comprising:
 a memory core unit for operating in a first predetermined voltage;   a peripheral circuit unit electrically connected to the memory core unit for operating in a second predetermined voltage, wherein the second predetermined voltage is lower than 1.1V; and   an input/output unit electrically connected to the peripheral circuit unit and the memory core unit for operating in a third predetermined voltage, wherein the third predetermined voltage is lower than 1.1V.   
     
     
         7 . The dynamic random access memory of  claim 6 , wherein the first predetermined voltage is lower than 1.1V. 
     
     
         8 . The dynamic random access memory of  claim 6 , wherein the first predetermined voltage is equal to 1.8V±0.1V.