Hub devices and methods for initializing hub device

Abstract

A hub device includes a first chip, a second chip and an external memory device. The first chip includes at least a first upstream port and multiple first downstream ports. The second chip includes at least a second upstream port and multiple second downstream ports. The external memory device stores firmware data corresponding to the first chip and the second chip. One of the first downstream ports of the first chip is coupled to the second upstream port of the second chip to form a tiered hub. The first chip and the second chip are sequentially enabled and the first chip and the second chip sequentially load the corresponding firmware data.

What is claimed is: 
     
         1 . A hub device, comprising:
 a first chip, comprising at least a first upstream port and a plurality of first downstream ports;   a second chip, comprising at least a second upstream port and a plurality of second downstream ports; and   an external memory device, storing firmware data corresponding to the first chip and the second chip,   wherein one of the first downstream ports of the first chip is coupled to the second upstream port of the second chip to form a tiered hub, and the first chip and the second chip are sequentially enabled and the first chip and the second chip sequentially load the corresponding firmware data.   
     
     
         2 . The hub device as claimed in  claim 1 , further comprising:
 a start-up circuit, for generating a first start-up signal to the first chip,   wherein the first chip is enabled in response to the first start-up signal to read the firmware data corresponding to the first chip from the external memory device, and then to generate a second start-up signal to the second chip, and   wherein the second chip is enabled in response to the second start-up signal to read the firmware data corresponding to the second chip from the external memory device.   
     
     
         3 . The hub device as claimed in  claim 1 , further comprising:
 a start-up circuit, for generating a first start-up signal to the first chip; and   a delay circuit, for delaying the first start-up signal to generate a second start-up signal to the second chip after a predetermined time interval,   wherein the first chip is enabled in response to the first start-up signal to read the firmware data corresponding to the first chip from the external memory device, and   wherein the second chip is enabled in response to the second start-up signal to read the firmware data corresponding to the second chip from the external memory device.   
     
     
         4 . The hub device as claimed in  claim 1 , further comprising:
 a start-up circuit, for generating a first start-up signal to the first chip,   wherein the first chip is enabled in response to the first start-up signal to read the firmware data corresponding to the first chip and the second chip from the external memory device, and then to generate a second start-up signal to the second chip, and   wherein the second chip is enabled in response to the second start-up signal to receive the firmware data corresponding to the second chip from the first chip.   
     
     
         5 . The hub device as claimed in  claim 1 , further comprising:
 a start-up circuit, for generating a first start-up signal to the first chip; and   a delay circuit, for delaying the first start-up signal to generate a second start-up signal to the second chip after a predetermined time interval,   wherein the first chip is enabled in response to the first start-up signal to read the firmware data corresponding to the first chip and the second chip from the external memory device, and   wherein the second chip is enabled in response to the second start-up signal to receive the firmware data corresponding to the second chip from the first chip.   
     
     
         6 . The hub device as claimed in  claim 1 , wherein the first chip and the second chip further comprises:
 a processor   an internal static random access memory; and   an input/output interface module.   
     
     
         7 . The hub device as claimed in  claim 6 , further comprising:
 a start-up circuit, for generating a first start-up signal to the first chip,   wherein the first chip is enabled in response to the first start-up signal to read the firmware data corresponding to the first chip from the external memory device and then to store the firmware data corresponding to the first chip in the internal static random access memory of the first chip, and then the processor of the first chip further generates a second start-up signal and transmits the second start-up signal to the second chip via the input/output interface module so as to enable the second chip, and   wherein the second chip is enabled in response to the second start-up signal to read the firmware data corresponding to the second chip from the external memory device.   
     
     
         8 . The hub device as claimed in  claim 7 , wherein the first chip and the second chip read the corresponding firmware data from the external memory device via the input/output interface module and a Serial Peripheral Interface (SPI) bus or an Inter-Integrated Circuit (I2C) bus. 
     
     
         9 . The hub device as claimed in  claim 6 , further comprising:
 a start-up circuit, for generating a first start-up signal to the first chip,   wherein the first chip is enabled in response to the first start-up signal for reading the firmware data corresponding to the first chip and the second chip from the external memory device and then storing the firmware data corresponding to the first chip and the second chip in the internal static random access memory of the first chip, and then the processor of the first chip further generates a second start-up signal and transmits the second start-up signal to the second chip via the input/output interface module of the first chip so as to enable the second chip, and   wherein the second chip is enabled in response to the second start-up signal for receiving the firmware data corresponding to the second chip from the first chip.   
     
     
         10 . The hub device as claimed in  claim 9 , wherein the first chip reads the firmware data corresponding to the first chip and the second chip from the external memory device via the input/output interface module of the first chip and a first SPI bus or a first I2C bus, and the second chip receives the firmware data corresponding to the second chip from the first chip via a second SPI bus, a second I2C bus or a System Management (SM) bus in the input/output interface module of the second chip. 
     
     
         11 . The hub device as claimed in  claim 6 , wherein the input/output interface module of the first chip comprises at least a General Purpose Input/Output (GPIO) pin for transmitting the second start-up signal. 
     
     
         12 . A method for initializing a hub device, wherein the hub device comprises at least a first chip and a second chip, and an external memory device, the external memory device being shared by the first chip and the second chip and storing firmware data of the first chip and the second chip, the method comprising:
 generating a first start-up signal to enable the first chip;   reading the firmware data corresponding to the first chip from the external memory device by the first chip;   generating a second start-up signal to enable the second chip; and   reading the firmware data corresponding to the second chip from the external memory device by the second chip.   
     
     
         13 . The method as claimed in  claim 12 , wherein the second start-up signal is generated by the first chip. 
     
     
         14 . The method as claimed in  claim 12 , wherein the second start-up signal is generated by a delay circuit based on the first start-up signal after receiving the first start-up signal and waiting for a predetermined time interval, wherein the predetermined time interval is longer than a time interval required for the first chip to read the firmware data corresponding to the first chip. 
     
     
         15 . The method as claimed in  claim 12 , wherein the steps of reading the firmware data corresponding to the first chip from the external memory device by the first chip and reading the firmware data corresponding to the second chip from the external memory device by the second chip are executed sequentially at a predetermined time span, such that the second chip reads the external memory device after the first chip has finished reading the external memory device. 
     
     
         16 . A method for initializing a hub device, wherein the hub device comprises at least a first chip and a second chip, and an external memory device, the external memory device being shared by the first chip and the second chip and storing firmware data of the first chip and the second chip, the method comprising:
 generating a first start-up signal to enable the first chip;   reading the firmware data corresponding to the first chip and the second chip from the external memory device by the first chip;   generating a second start-up signal to enable the second chip; and   receiving the firmware data corresponding to the second chip from the first chip by the second chip.   
     
     
         17 . The method as claimed in  claim 16 , further comprising:
 issuing a request signal by the second chip to the first chip for requesting the first chip to transmit the firmware data corresponding to the second chip to the second chip.   
     
     
         18 . The method as claimed in  claim 16 , wherein the second start-up signal is generated by the first chip. 
     
     
         19 . The method as claimed in  claim 16 , wherein the second start-up signal is generated by a delay circuit based on the first start-up signal after receiving the first start-up signal and waiting for a predetermined time interval, wherein the predetermined time interval is longer than a time interval required for reading the firmware data corresponding to the first chip and the second chip. 
     
     
         20 . The method as claimed in  claim 16 , wherein when the first chip is enabled, the method further comprises:
 determining whether the external memory device exists and whether the stored firmware data of the external memory device is valid.