US2014016680A1PendingUtilityA1

Multi-user detection using equalization and successive interference cancellation

Assignee: INTERDIGITAL TECH CORPPriority: Mar 3, 2003Filed: Sep 23, 2013Published: Jan 16, 2014
Est. expiryMar 3, 2023(expired)· nominal 20-yr term from priority
Inventors:Ariela Zeira
H04B 1/7107H04B 1/7105H04B 1/71072H04L 25/03006H04B 1/123
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Claims

Abstract

A method and apparatus for multi-user detection is disclosed. A signal is received in a shared spectrum, and samples of the received signals are produced as a received vector. The received vector is segmented into vector segments. Each segment has a portion that overlaps with another segment and the overlapping portion includes at least one chip less than twice a channel impulse response length. For each vector segment, symbols are successively determined for communications by determining symbols for a communication in the communications, ordering the communications by received power and removing a contribution of the communication from the vector segment. The determining of symbols includes equalizing an input vector corresponding to a segment of the received vector using fast Fourier transform. The determined symbols are assembled into a data vector for each communication in the communications.

Claims

exact text as granted — not AI-modified
1 . An integrated circuit (IC), implemented in a wireless transmit/receive unit (WTRU), the IC comprising:
 circuitry configured to receive a signal in a shared spectrum;   circuitry configured to produce samples of the received signal as a received vector;   circuitry configured to segment the received vector into a plurality of vector segments, wherein each segment has a portion overlapping with another segment and the overlapping portion includes at least one chip less than twice a channel impulse response length;   circuitry configured to successively determine for each vector segment symbols for a plurality of communications by determining symbols for a communication in the plurality of communications, ordering the communications by received power and removing a contribution of the communication from the vector segment, wherein the circuitry is configured to determine the symbols by equalizing an input vector corresponding to a segment of the received vector using fast Fourier transform; and   circuitry configured to assemble the determined symbols into a data vector for each communication in the plurality of communications.   
     
     
         2 . The IC of  claim 1 , further comprising circuitry configured to despread the equalized vector segment and circuitry configured to make hard decisions on the despread equalized vector segment. 
     
     
         3 . The IC of  claim 2 , further comprising circuitry configured to produce a despread equalized vector segment including a plurality of soft symbols by apply a code associated with the communication to the equalized vector segment. 
     
     
         4 . The IC of  claim 1 , further comprising circuitry configured to remove a contribution of the communication from the vector segment by subtracting the determine symbols from the vector segment. 
     
     
         5 . The IC of  claim 1 , further comprising circuitry configured to determine symbols for a communication of interest. 
     
     
         6 . An integrated circuit (IC), implemented in a base station, the IC comprising:
 circuitry configured to receive a signal in a shared spectrum;   circuitry configured to produce samples of the received signal as a received vector;   circuitry configured to segment the received vector into a plurality of vector segments;   circuitry configured to successively determine, for each vector segment, symbols for a plurality of communications by determining symbols for a communication in the plurality of communications and removing a contribution of the communication from the vector segment; and   circuitry configured to assemble the determined symbols into a data vector for each communication in the plurality of communications.   
     
     
         7 . The IC of  claim 6 , further comprising circuitry configured to equalize the vector segment, circuitry configured to despread the equalized vector segment, and circuitry configured to make hard decisions on the despread equalized vector segment. 
     
     
         8 . The IC of  claim 7 , further comprising circuitry configured to equalize the vector segment using a fast Fourier transform. 
     
     
         9 . The IC of  claim 7 , further comprising circuitry configured to produce a despread equalized vector segment including a plurality of soft symbols by applying a code associated with the communication to the equalized vector segment. 
     
     
         10 . The IC of  claim 6 , further comprising circuitry configured to remove a contribution of the communication from the vector segment by subtracting the determined symbols from the vector segment. 
     
     
         11 . The IC of  claim 6 , further comprising circuitry configured to determine symbols for a communication of interest.

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