Current detecting circuit, controlling circuit and power conversion circuit

Abstract

The present invention provides a current detection circuit, a controlling circuit using the current detection circuit and a power conversion circuit using the controlling circuit, the current detection circuit comprises a sample keeping circuit, a rising edge detection circuit, a falling edge detection circuit, a sequential controlling circuit, a synchronous detection circuit and a lowpass filter. The inventive current detection circuit for the power conversion circuit obtains signals of the output current by detecting loop current of the master switch and processing the loop current.

1 . A current detection circuit for a power conversion circuit, wherein the current detection circuit comprises a sample keeping circuit, a rising edge detection circuit, a falling edge detection circuit, a sequential controlling circuit, a synchronous detection circuit and a lowpass filter, a first end of the sample keeping circuit is connected to a third of the drive controlling transistor S 2 , a second end of the sample keeping circuit is connected to a first end of the sequential controlling circuit, a third end of the sample keeping circuit is connected to a first end of the synchronous detection circuit, a first end of the rising edge detection circuit is connected to a second end of a master switch S 1 , a second end of the rising edge detection circuit is connected to a second end of the sequential controlling circuit, a first end of the falling edge detection circuit is connected to a second end of the master switch Si, a second end of the falling edge detection circuit is connected to a third end of the sequential controlling circuit, a fourth end of the sequential controlling circuit is connected to a second end of the synchronous detection circuit, a third end of the synchronous detection circuit is connected to is a first end of the lowpass filter, and a second end of the lowpass filter is an output end of the current detection circuit. 
     
     
         2 . The current detection circuit for the power conversion circuit of  claim 1 , wherein the sample keeping circuit comprises a field effect transistor N 1 , an inverter INV 1 , a capacitor C 3 , an amplifier A 1 , resistors R 3  and R 4 , a drain of the field effect transistor N 1  is used as a first end of the sample keeping circuit, a grid of the field effect transistor N 1  is connected to an input end of the inverter INV 1 , a source of the field effect transistor N 1  is grounded by the capacitor C 3 , signals of the input end of the inverter INV 1  and controlling signals of a first end of the drive controlling transistor S 2  have the same phase, an output end of the inverter INV 1  is used as a second end of the sample keeping circuit, a noninverting input end of the amplifier A 1  is connected to a source of the field effect transistor N 1 , an inverting input of the amplifier A 1  is grounded by the resistor R 3 , an output end of the amplifier A 1  is connected to the inverting input end by the resistor R 4  and used as a third end of the sample keeping circuit, the sample keeping circuit keeps on sampling during the switching on of the master switch S 1 , a signal output by the sample keeping circuit is proportional with input current signals thereof, when the master switch S 1  is switched off, the sample keeping circuit maintains sampling. 
     
     
         3 . The current detection circuit for the power conversion circuit of  claim 1 , wherein the rising edge detection circuit comprises an amplifier A 2 , resistors R 5  and R 6 , a first end of the resistor R 5  is used as a first end of the rising edge detection circuit, a second end of the rising edge detection circuit is grounded by the resistor R 6 , a noninverting input end of the amplifier A 2  is connected to a node between the resistors R 5  and R 6 , an inverting input end of the amplifier A 2  is connected to a reference voltage end, an output end of the amplifier A 2  is used as a second end of the rising edge detection circuit connected to a second end of the sequential controlling circuit, when the rising edge detection circuit detects that the voltage of the upper end of the master switch Si rises to a predefined value, a latch circuit is triggered by the rising edge detection circuit to control synchronous detection circuit in order to output signals from the current synchronous detection circuit to a low-pass filter circuit. 
     
     
         4 . The current detection circuit for the power conversion circuit of  claim 1 , wherein the falling edge detection circuit comprises an amplifier A 3 , an inverter INV 2 , a field effect transistor N 2 , a capacitor C 4 , clamping zeners Z 1 -Z 4 , resistors R 7  and R 8 , a first end of the resistor R 7  is used as a first end of the falling edge detection circuit, a second end of the resistor R 7  is grounded by the resistor R 8 , a first end of the capacitor C 4  is connected to a node between the resistors R 7  and R 8 , a second end of the capacitor C 4  is connected to a noninverting input end of the amplifier A 3 , an inverting input end of the amplifier A 3  is connected to a reference voltage end, an output end of the amplifier A 3  is connected to an input end of the inverter INV 2 , an output end of the inverter INV 2  is used as a second of the falling edge detection circuit, both of a grid and drain of the field effect transistor N 2  are connected to a noninverting input end of the amplifier A 3 , a source of the field effect transistor N 2  is grounded, a cathode of the clamping zener Z 1  is connected to a node between the resistors R 7  and R 8 , an anode of the clamping zener Z 1  is grounded by the clamping zeners Z 2 , Z 3  and Z 4  in turn, when a falling edge of the voltage of the upper end of the master switch Si is detected by the falling edge detection circuit, a latch is released, the synchronous detection circuit is switched off, thus input signals of the low-pass filter circuit are zero. 
     
     
         5 . The current detection circuit for the power conversion circuit of  claim 1 , wherein the sequential controlling circuit comprises D-flip flops DF 1  and DF 2 , a reset end of the D-flip flop DF 1  is used as a first end of the sequential controlling circuit connected to a second end of the sample keeping circuit, a clock signal end of the D-flip flop DF 1  is used as a third end of the sequential controlling circuit connected to a second end of the falling edge detection circuit, a signal input end of the D-flip flop DF 1  is connected to a power supply, an output end of the D-flip flop DF 1  is connected to a reset end of the D-flip flop DF 2 , an inverting output end of the D-flip flop DF 1  is not used, a clock signal end of the D-flip flop DF 2  is used as a second end of the sequential controlling circuit connected to a second end of the rising edge detection circuit, a signal input end of the D-flip flop DF 2  is connected to a power supply, an output end is not used, an inverting output end the D-flip flop DF 2  is used as a fourth end of the sequential controlling circuit connected to a second end of the synchronous detection circuit. 
     
     
         6 . The current detection circuit for the power conversion circuit of  claim 1 , wherein the synchronous detection circuit comprises an inverter INV 3 , field effect transistors N 3  and N 4 , a drain of the field effect transistor N 3  is used as a first end of the synchronous detection circuit connected to a third end of the sample keeping circuit, a source of the field effect transistor N 3  is connected to a drain of the field effect transistor N 4 , a grid of the field effect transistor N 3  is connected to an output end of the inverter INV 3 , an input end of the inverter INV 3  is used as a second end of the synchronous detection circuit connected to a fourth end of the sequential controlling circuit, a grid of the field effect transistor N 4  is connected to an input end of the inverter INV 3 , a source of the field effect transistor N 4  is grounded, and the drain of the field effect transistor N 4  also is used as a third end of the synchronous detection circuit connected to a first end of the lowpass filter. 
     
     
         7 . The current detection circuit for the power conversion circuit of  claim 1 , wherein a first end of the lowpass filter is connected to a third end of the synchronous detection circuit, a second end of the lowpass filter is connected to an input end of the error amplifier, after the lowpass filter filters input signals thereof, the lowpass filter outputs a signal directly proportional to an average value of output current of the DC load  15 . 
     
     
         8 . A controlling circuit using the current detection circuit for the power conversion circuit of  claim 1 , wherein the controlling circuit further comprises a valley detection circuit, an error amplifier, a PWM controller and a drive controlling circuit, the end U of the current detection circuit is connected to a third end of the drive controlling transistor S 2 , the end D of the current detection circuit is connected to a second end of the master switch S 1 , the output end of the current detection circuit is the second end of the lowpass filter and connected to an input end of the error amplifier, an output end of the error amplifier is connected to the PWM controller, the PWM controller is connected to the drive controlling circuit, the drive controlling circuit is further connected to an output end of the valley detection circuit, and an input end of the valley detection circuit is connected to a second end of the master switch S 1 . 
     
     
         9 . A power conversion circuit using the controlling circuit of  claim 8 , wherein the power conversion circuit comprises:
 a filter circuit  12  connected to an external AC, wherein the filter circuit is used to filter the noise in the AC,   a rectification circuit  13  connected to the filter circuit and used for converting AC to DC, and   a single stage power conversion circuit  14  comprising a capacitor C 1 , an inductor or switching transformer L, a diode D 1 , a capacitor C 2 , a master switch S 1 , a drive controlling transistor S 2 , a resistor R 2 , a controlling circuit and an auxiliary power supply circuit, a first end of the capacitor C 1  is connected to both of the rectification circuit and a cathode of a DC load, a second of the capacitor C 1  is grounded, a first end of the inductor or switching transformer L is connected to a cathode of the DC load, a second end of the inductor or switching transformer L is connected to an anode of a diode D 1 , a cathode of the diode D 1  is connected to an anode of the DC load, the capacitor C 2  is connected between the anode and cathode of the DC load, a first end of the master switch Si is connected to the cathode of the DC load by the auxiliary power supply circuit, a first end of the master switch S 1  is connected to the anode of the diode D 1 , a first end of the drive controlling transistor S 2  is connected to the controlling circuit, a second end of the drive controlling transistor S 2  is connected to a third end of the master switch S 1 , a third end of the drive controlling transistor S 2  is grounded by the resistor R 2  and connected to the controlling circuit, the controlling circuit is further connected to a second end of the master switch S 1 , the single stage power conversion circuit is used to adjust a power factor and obtain signals of output current by detecting loop current of the master switch and processing the loop current.   
     
     
         10 . The power conversion circuit of  claim 9 , wherein the auxiliary power supply circuit comprises a diode D 2 , a resistor R 1 , a capacitor C 6  and a voltage regulator Z 2 , an anode of the diode D 2  is connected to a cathode of the DC load, a cathode of the diode D 2  is grounded by the resistor R 1  and capacitor C 6  in turn, a node between the resistor R 1  and capacitor C 6  is connected to a first end of the master switch S 1 , an anode of the voltage regulator Z 2  is grounded, and a cathode of the voltage regulator Z 2  is connected to a first end of the master switch S 1 .