Solid-state imaging apparatus with plural readout modes, and electronic equipment

Abstract

A solid-state imaging apparatus includes: a pixel array section in which pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix form, and a plurality of systematic pixel drive lines to transmit drive signals to read out signals from the pixels are arranged for each pixel row; and a row scanning section to simultaneously output the drive signals through the plurality of systematic pixel drive lines to a plurality of pixel rows for different pixel columns.

What is claimed is: 
     
         1 . A solid-state imaging apparatus comprising:
 a pixel array in which pixels having a plurality of transistors are two-dimensionally arranged;   a plurality of signal transfer lines disposed on respective pixel rows;   a row scanning section that outputs a control signal through the plurality of signal transfer lines; and   
       wherein
 the plurality of signal transfer lines include at least a first signal transfer line and a second signal transfer line; 
 the first signal transfer line is associated with a first transistor of a first pixel; 
 the second signal transfer line is associated with a second transistor of a second pixel disposed at a same pixel row as the first pixel; 
 the row scanning section outputs the control signal through the first signal transfer line and the second signal transfer line at a different timing during a first mode; 
 the row scanning section outputs the control signal through the first signal transfer line and the second signal transfer line at a same timing during a second mode. 
 
     
     
         2 . The solid-state imaging apparatus according to  claim 1 , wherein the control signal includes a drive signal to read out signals from the pixels. 
     
     
         3 . The solid-state imaging apparatus according to  claim 2 , wherein the row scanning section successively outputs the drive signal to the respective pixel rows of the pixel array. 
     
     
         4 . A method for driving a solid-state imaging apparatus, the method comprising:
 forming a matrix with pixels having a plurality of transistors;   locating a plurality of signal transfer lines on respective pixel rows; and   outputting, by a row scanning section, a control signal through the plurality of signal transfer lines; and   
       wherein
 the plurality of signal transfer lines include at least a first signal transfer line and a second signal transfer line; 
 the first signal transfer line is associated with a first transistor of a first pixel; 
 the second signal transfer line is associated with a second transistor of a second pixel disposed at a same pixel row as the first pixel; 
 the row scanning section outputs the control signal through the first signal transfer line and the second signal transfer line at a different timing during a first mode; 
 the row scanning section outputs the control signal through the first signal transfer line and the second signal transfer line at a same timing during a second mode. 
 
     
     
         5 . The method according to  claim 4 , the outputting the control signal includes outputting a drive signal to read out signals from the pixels. 
     
     
         6 . The solid-state imaging apparatus according to  claim 5 , the outputting the drive signal includes successively outputting the drive signal to the respective pixel rows. 
     
     
         7 . An electronic equipment comprising:
 a solid-state imaging apparatus including:   a pixel array in which pixels having a plurality of transistors are two-dimensionally arranged;   a plurality of signal transfer lines disposed on respective pixel rows;   a row scanning section that outputs a control signal through the plurality of signal transfer lines; and   
       wherein
 the plurality of signal transfer lines include at least a first signal transfer line and a second signal transfer line; 
 the first signal transfer line is associated with a first transistor of a first pixel; 
 the second signal transfer line is associated with a second transistor of a second pixel disposed at a same pixel row as the first pixel; 
 the row scanning section outputs the control signal through the first signal transfer line and the second signal transfer line at a different timing during a first mode; 
 the row scanning section outputs the control signal through the first signal transfer line and the second signal transfer line at a same timing during a second mode.