Dynamic random access memory and boosted voltage producer therefor

Abstract

A dynamic random access memory (DRAM) is selectively operable in a sleep mode and another mode. The DRAM has data storage cells that are refreshed in the refresh mode. A boosted voltage is provided for the operation of the DRAM. A boosted voltage provider includes a group of charge pump circuits that are selectively activated by a pump control circuit based on a refresh time for refreshing data in the DRAM cells in the sleep mode.

What is claimed is: 
     
         1 . A dynamic random access memory (DRAM) having storage cells, the data of which is refreshed in a sleep mode, the DRAM comprising:
 a voltage producer for providing an output voltage to be used for operation of the DRAM;   a voltage level detector for determining whether the output voltage reaches a predetermined level to provide a determination result; and   a controller for providing the control signal in response to a refresh time in the sleep mode.