Shift Register And Display Device And Driving Method Thereof

Abstract

The power consumption of a shift register or a display device including the shift register is reduced. A clock signal is supplied to a shift register by a plurality of wirings, not by one wiring. Any one of the plurality of wirings supplies a clock signal in only part of the operation period of the shift register, not during the whole operation period of the shift register. Therefore, the capacity load caused with the supply of clock signals can be reduced, leading to reduction in power consumption of the shift register.

1 . (canceled) 
     
     
         2 . A display device comprising a driver circuit, the driver circuit comprising a shift resister, the shift resister comprising a transistor, the transistor comprising:
 a first gate electrode over a substrate;   a first insulating layer over the first gate electrode;   an oxide semiconductor layer including a channel formation region over the first insulating layer;   a second insulating layer over the oxide semiconductor layer; and   a second gate electrode over the second insulating layer;   wherein the first gate electrode extends beyond side edges of the oxide semiconductor layer in a channel width direction of the transistor, and   wherein the second gate electrode extends beyond the side edges of the oxide semiconductor layer in the channel width direction of the transistor.   
     
     
         3 . The display device according to  claim 2 ,
 wherein the transistor further comprises a source electrode layer and a drain electrode layer over the oxide semiconductor layer,   wherein the second insulating layer is over the source electrode layer and the drain electrode layer, and   wherein the second insulating layer is in contact with part of an upper surface of the oxide semiconductor layer between the source electrode layer and the drain electrode layer.   
     
     
         4 . The display device according to  claim 2 , wherein the second gate electrode overlaps an edge of the first gate electrode. 
     
     
         5 . The display device according to  claim 2 ,
 wherein the transistor further comprises a third insulating layer between the substrate and the first gate electrode, and   wherein the third insulating layer includes a layer selected from a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer and a silicon nitride oxide layer.   
     
     
         6 . The display device according to  claim 2 , wherein the oxide semiconductor layer comprises indium and zinc. 
     
     
         7 . The display device according to  claim 2 , further comprising a pixel portion, the pixel portion comprising:
 a second transistor;   a liquid crystal layer; and   a pixel electrode electrically connected to the liquid crystal layer,   wherein one of source and drain of the second transistor is electrically connected to the pixel electrode.   
     
     
         8 . The display device according to  claim 2 , further comprising a pixel portion, the pixel portion comprising:
 a second transistor;   a light-emitting layer; and   a pixel electrode electrically connected to the light-emitting layer,   wherein one of source and drain of the second transistor is electrically connected to the pixel electrode.   
     
     
         9 . A display device comprising a driver circuit, the driver circuit comprising a shift resister, the shift resister comprising a transistor, the transistor comprising:
 a first gate electrode over a substrate;   a first insulating layer including a first layer and a second layer over the first gate electrode, wherein each of the first layer and the second layer is selected from a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer and a silicon nitride oxide layer;   an oxide semiconductor layer including a channel formation region over the first insulating layer;   a second insulating layer over the oxide semiconductor layer, wherein the second insulating layer includes a layer selected from a silicon oxide layer, a silicon nitride oxide layer, an aluminum oxide layer and an aluminum oxynitride layer; and   a second gate electrode over the second insulating layer,   wherein the first gate electrode extends beyond side edges of the oxide semiconductor layer in a channel width direction of the transistor, and   wherein the second gate electrode extends beyond the side edges of the oxide semiconductor layer in the channel width direction of the transistor.   
     
     
         10 . The display device according to  claim 9 ,
 wherein the transistor further comprises a source electrode layer and a drain electrode layer over the oxide semiconductor layer,   wherein the second insulating layer is over the source electrode layer and the drain electrode layer, and   wherein the second insulating layer is in contact with part of an upper surface of the oxide semiconductor layer between the source electrode layer and the drain electrode layer.   
     
     
         11 . The display device according to  claim 9 , wherein the second gate electrode overlaps an edge of the first gate electrode. 
     
     
         12 . The display device according to  claim 9 ,
 wherein the transistor further comprises a third insulating layer between the substrate and the first gate electrode, and   wherein the third insulating layer includes a layer selected from a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer and a silicon nitride oxide layer.   
     
     
         13 . The display device according to  claim 9 , wherein the oxide semiconductor layer comprises indium and zinc. 
     
     
         14 . The display device according to  claim 9 , further comprising a pixel portion, the pixel portion comprising:
 a second transistor;   a liquid crystal layer; and   a pixel electrode electrically connected to the liquid crystal layer,   wherein one of source and drain of the second transistor is electrically connected to the pixel electrode.   
     
     
         15 . The display device according to  claim 9 , further comprising a pixel portion, the pixel portion comprising:
 a second transistor;   a light-emitting layer; and   a pixel electrode electrically connected to the light-emitting layer,   wherein one of source and drain of the second transistor is electrically connected to the pixel electrode.   
     
     
         16 . A display device comprising a driver circuit, the driver circuit comprising a shift resister, the shift resister comprising:
 a first line configured to supply a first clock signal;   a second line configured to supply a first inverted clock signal;   a third line configured to supply a second clock signal;   a fourth line configured to supply a second inverted clock signal;   a first stage electrically connected to the first line;   a second stage electrically connected to the second line;   a third stage electrically connected to the third line; and   a fourth stage electrically connected to the fourth line,   wherein an output terminal of the first stage is electrically connected to an input terminal of the second stage,   wherein an output terminal of the third stage is electrically connected to an input terminal of the fourth stage, and   wherein the first stage comprises a transistor, the transistor comprising:
 a first gate electrode over a substrate; 
 a first insulating layer over the first gate electrode; 
 an oxide semiconductor layer including a channel formation region over the first insulating layer; 
 a second insulating layer over the oxide semiconductor layer; and 
 a second gate electrode over the second insulating layer; 
 wherein the first gate electrode extends beyond side edges of the oxide semiconductor layer in a channel width direction of the transistor, and 
 wherein the second gate electrode extends beyond the side edges of the oxide semiconductor layer in the channel width direction of the transistor. 
   
     
     
         17 . The display device according to  claim 16 ,
 wherein the transistor further comprises a source electrode layer and a drain electrode layer over the oxide semiconductor layer,   wherein the second insulating layer is over the source electrode layer and the drain electrode layer, and   wherein the second insulating layer is in contact with part of an upper surface of the oxide semiconductor layer between the source electrode layer and the drain electrode layer.   
     
     
         18 . The display device according to  claim 16 , wherein the second gate electrode overlaps an edge of the first gate electrode. 
     
     
         19 . The display device according to  claim 16 , wherein the oxide semiconductor layer comprises indium and zinc. 
     
     
         20 . The display device according to  claim 16 , further comprising a pixel portion, the pixel portion comprising:
 a second transistor;   a liquid crystal layer; and   a pixel electrode electrically connected to the liquid crystal layer,   wherein one of source and drain of the second transistor is electrically connected to the pixel electrode.   
     
     
         21 . The display device according to  claim 16 , further comprising a pixel portion, the pixel portion comprising:
 a second transistor;   a light-emitting layer; and   a pixel electrode electrically connected to the light-emitting layer,   wherein one of source and drain of the second transistor is electrically connected to the pixel electrode.