US2013335658A1PendingUtilityA1

Pixel Architecture for Electronic Displays

Assignee: APPLE INCPriority: Jun 15, 2012Filed: Sep 27, 2012Published: Dec 19, 2013
Est. expiryJun 15, 2032(~5.9 yrs left)· nominal 20-yr term from priority
G09G 3/3648G02F 1/136227G02F 1/136286G09G 2300/0426
46
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Claims

Abstract

An electronic display for providing a visual or video output for an electronic device. The electronic device includes a transistor layer configured to activate a first pixel row and a second pixel row. For each pixel in the first pixel row and the second pixel row, the transistor layer includes a switch transistor, a pixel electrode, and a common electrode. The electronic device further includes a pixel controller for selectively activating each pixel. The pixel controller includes a first gate line, a first drive line, and a second drive line. During operation, the first gate line provides a charge to the pixel electrode for a first pixel in the first pixel row and for a second pixel in the second pixel row, and the first drive line activates the switch transistor for the first pixel, and the second drive line activates the switch transistor for the second pixel.

Claims

exact text as granted — not AI-modified
1 . A display for providing a visual output for an electronic device, comprising:
 a transistor layer for activating a first pixel row and a second pixel row, wherein the transistor layer for each pixel in the first pixel row and the second pixel row includes
 a switch transistor; 
 a pixel electrode; and 
 a common electrode; 
   a pixel controller for selectively activating each pixel including
 a first gate line; 
 a first drive line; and 
 a second drive line; wherein p 1  the first gate line provides a charge to the pixel electrode for a first pixel in the first pixel row and for a second pixel in the second pixel row; and 
   the first drive line activates the switch transistor for the first pixel, and the second drive line activates the switch transistor for the second pixel.   
     
     
         2 . The display of  claim 1 , further comprising a conductive layer in communication with the pixel controller, wherein the conductive layer activates the common electrode for the first pixel and the second pixel. 
     
     
         3 . The display of  claim 2 , wherein the transistor layer further includes one or more conductive apertures that communicatively connect the common electrode to the conductive layer. 
     
     
         4 . The display of  claim 2 , wherein the conductive layer is formed of a metallic element. 
     
     
         5 . The display of  claim 1 , wherein each pixel in the first pixel row and each pixel in the second pixel row further comprises a liquid crystal layer in communication with the transistor layer, wherein the switch transistor selectively aligns crystals in the liquid crystal layer. 
     
     
         6 . The display of  claim 1 , wherein the first gate line provides the charge to the first pixel and the second pixel substantially simultaneously. 
     
     
         7 . A computer comprising:
 a processor;   a storage component in communication with the processor;   a display in communication with the processor and the storage component, the display comprising:
 a transistor layer for activating a first pixel row and a second pixel row, wherein the transistor layer for each pixel in the first pixel row and the second pixel row includes
 a switch transistor 
 a pixel electrode; and 
 a common electrode; 
 
 a pixel controller for selectively activating the transistor layer including
 a first gate line; 
 a first drive line; and 
 a second drive line; wherein 
 
   the first gate line provides a charge to the pixel electrode for a first pixel in the first pixel row and for a second pixel in the second pixel row; and   the first drive line activates the switch transistor for the first pixel, and the second drive line activates the switch transistor for the second pixel.   
     
     
         8 . The computer of  claim 7 , wherein the switch transistor for the first pixel row is inverted relative to the switch transistor for the second pixel row. 
     
     
         9 . The computer of  claim 8 , wherein a gate of the switch transistor for the first pixel is coupled to the first gate line at a bottom of the first pixel and a gate for the switch transistor for the second pixel is coupled to the first gate line at a top of the second pixel. 
     
     
         10 . The computer of  claim 7 , wherein the display further comprises a conductive layer in communication with the pixel controller, wherein the conductive layer activates the common electrode for the first pixel and the second pixel. 
     
     
         11 . The computer of  claim 10 , wherein the transistor layer further includes one or more conductive apertures that communicatively connect the common electrode to the conductive layer. 
     
     
         12 . The computer of  claim 10 , wherein the conductive layer is formed of a metallic element. 
     
     
         13 . The computer of  claim 7 , wherein each pixel in the first pixel row and each pixel in the second pixel row further comprises a liquid crystal layer in communication with the transistor layer, wherein the switch transistor selectively aligns crystals in the liquid crystal layer. 
     
     
         14 . The computer of  claim 7 , wherein the first gate line provides the charge to the first pixel and the second pixel substantially simultaneously. 
     
     
         15 . The computer of  claim 7 , wherein the each pixel of the display further comprises a color filter. 
     
     
         16 . An electronic display comprising:
 a first pixel row having a first pixel and a first pixel electrode;   a second pixel row having a second pixel and a second pixel electrode;   a switching layer in communication with the first pixel and the second pixel, wherein the switching layer selectively activates the first pixel and the second pixel, the switching layer including
 a first switch transistor in communication with the first pixel electrode; and 
 a second switch transistor in communication with the second pixel electrode; 
   a pixel controller in communication with the first pixel and the second pixel, wherein the pixel controller selectively activates the switching layer, the pixel controller comprises
 a first gate line; 
 a first drive line; and 
 a second drive line; wherein 
   the first gate line provide a charge to the first pixel electrode and the charge to the second pixel electrode; and   the first drive line activates the first switch transistor and the second drive line activates the second switch transistor.   
     
     
         17 . The electronic display of  claim 16 , wherein the first gate line provides the charge to the first pixel electrode and the charge to the second pixel electrode substantially simultaneously. 
     
     
         18 . The electronic display of  claim 16 , wherein the first switch transistor is inverted relative to the second switch transistor. 
     
     
         19 . The electronic display of  claim 18 , wherein
 the first switch transistor has a first gate; and   the second transistor has a second gate; wherein   the first gate is coupled to the first gate line at a bottom of the first pixel; and   the second gate is coupled to the second gate line at a top of the second pixel.   
     
     
         20 . The electronic display of  claim 16 , further comprising
 a conductive layer in communication with the pixel controller;   the switching layer further includes
 a first common electrode for the first pixel; and 
 a second common electrode for the second pixel; wherein the conductive layer activates the first common electrode for the first pixel and the second common electrode for the second pixel.

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