US2013334491A1PendingUtilityA1

Methods for Forming Nickel Oxide Films for Use With Resistive Switching Memory Devices

Assignee: INTERMOLECULAR INCPriority: Dec 21, 2007Filed: Aug 21, 2013Published: Dec 19, 2013
Est. expiryDec 21, 2027(~1.4 yrs left)· nominal 20-yr term from priority
H10N 70/20H10N 70/8833H10N 70/826H10N 70/021H10N 70/023H10N 70/841H01L 45/1253
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Claims

Abstract

Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH) 2 film on the substrate, where the forming the Ni(OH) 2 occurs at the cathode; and annealing the Ni(OH) 2 film to form the NiO film, where the NiO film forms a portion of a resistive switching memory element. In some embodiments, methods further include forming a top electrode on the NiO film and before the forming the Ni(OH) 2 film, pre-treating the substrate. In some embodiments, methods are presented where the bottom electrode and the top electrode are a conductive material such as: Ni, Pt, Ir, Ti, Al, Cu, Co, Ru, Rh, a Ni alloy, a Pt alloy, an Ir alloy, a Ti alloy, an Al alloy, a Cu alloy, a Co alloy, a Ru alloy, and an Rh alloy.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A resistive switching memory element, comprising:
 a first conductive layer;   a nickel oxide layer formed on the first conductive layer; and   a second conductive layer formed above the nickel oxide layer;   wherein the first and second conductive layers are operable as electrodes;   wherein a resistance of the nickel oxide layer is switchable between two different values by applying a voltage across the electrodes; and   wherein the nickel oxide layer is formed by electrochemical deposition.   
     
     
         2 . The resistive switching memory element of  claim 1 , wherein the first conductive layer comprises at least one of nickel, platinum, iridium, titanium, aluminum, copper, cobalt, ruthenium, rhenium, or their alloys. 
     
     
         3 . The resistive switching memory element of  claim 1 , wherein the first conductive layer is formed by at least one of physical vapor deposition, chemical vapor deposition, atomic layer deposition, electrochemical plating, or electroless deposition. 
     
     
         4 . The resistive switching memory element of  claim 1 , wherein the nickel oxide layer is formed by electrochemical deposition using the first conductive layer as a cathode. 
     
     
         5 . The resistive switching memory element of  claim 4 , wherein the first conductive layer is chemically or electrochemically cleaned before the nickel oxide layer is formed. 
     
     
         6 . The resistive switching memory element of  claim 1 , wherein the nickel oxide layer is deposited as Ni(OH) 2  and converted to NiO by thermal decomposition. 
     
     
         7 . The resistive switching memory element of  claim 6 , wherein the thermal decomposition results from annealing at a temperature between 250 and 800 C. 
     
     
         8 . The resistive switching memory element of  claim 1 , wherein the nickel oxide layer is formed by electrochemical deposition from a Ni(NO 3 ) 2  solution. 
     
     
         9 . The resistive switching memory element of  claim 8 , wherein the Ni(NO 3 ) 2  solution further comprises an additional nitrate salt. 
     
     
         10 . The resistive switching memory element of  claim 9 , wherein the additional nitrate salt comprises at least one of Co(NO 3 ) 2 , LiNO 3 , Mg(NO 3 ) 2 , or Cr(NO 3 ) 3 . 
     
     
         11 . The resistive switching memory element of  claim 10 , wherein the Co(NO 3 ) 2 , LiNO 3 , Mg(NO 3 ) 2 , or Cr(NO 3 ) 3  is co-deposited with the Ni(NO 3 ) 2  to form a mixed layer of Co(OH) 2 /Ni(OH) 2 , LiNO 3 /Ni(OH) 2 , Mg(NO 3 ) 2 /Ni(OH) 2 , or Cr(NO 3 ) 3 /Ni(OH) 2 . 
     
     
         12 . The resistive switching memory element of  claim 11 , wherein the mixed layer is converted to a mixed oxide layer by thermal decomposition. 
     
     
         13 . The resistive switching memory element of  claim 12 , wherein the thermal decomposition results from annealing at a temperature between 250 and 800 C. 
     
     
         14 . The resistive switching memory element of  claim 1 , wherein the nickel oxide layer further comprises at least one dopant or at least one alloying element. 
     
     
         15 . The resistive switching memory element of  claim 1 , wherein the nickel oxide layer further comprises at least one of cobalt, lithium, magnesium, or chromium. 
     
     
         16 . The resistive switching memory element of  claim 1 , further comprising a buffer layer between the nickel oxide layer and the second conductive layer. 
     
     
         17 . The resistive switching memory element of  claim 16 , wherein the buffer layer is operable to enhance adhesion. 
     
     
         18 . The resistive switching memory element of  claim 16 , wherein the buffer layer is operable as a diffusion barrier. 
     
     
         19 . The resistive switching memory element of  claim 1 , wherein the second conductive layer comprises at least one of nickel, platinum, iridium, titanium, aluminum, copper, cobalt, ruthenium, rhenium, or their alloys. 
     
     
         20 . The resistive switching memory element of  claim 1 , wherein the second conductive layer is formed by at least one of physical vapor deposition, chemical vapor deposition, atomic layer deposition, electrochemical plating, or electroless deposition.

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