High bandwidth memory interface

Abstract

A memory module that includes a buffer and a plurality of synchronous memory devices. The memory module also includes bidirectional bus lines, and each of the synchronous memory devices has bidirectional data terminals. The buffer is configured to regenerate signals received on the bus lines for receipt by the synchronous memory devices, and to regenerate signals received from any one of the synchronous memory devices for receipt by the bus lines. The memory module may further include command lines and a clock line for providing commands and a clock signal to the synchronous memory devices via a command buffer. The combined data bus width of the memory module may be greater than the data bus width of any single one of synchronous memory device, and the total address space provided by the memory module may be larger than the data space for any single synchronous memory device.

What is claimed is: 
     
         1 . A memory module comprising:
 a printed circuit board having a plurality of connectors on one edge;   a plurality of memory devices mounted on the printed circuit board having connections to the connectors; and   a plurality of film resistors connected to the connections.   
     
     
         2 . A memory module as claimed in  claim 1  wherein the film resistors are termination resistors. 
     
     
         3 . A memory module as claimed in  claim 1  wherein the film resistors are series stub termination resistors. 
     
     
         4 . A memory module as claimed in  claim 3  wherein the film resistors are approximately 20 ohms. 
     
     
         5 . A memory module as claimed in  claim 1  wherein the film resistors are located on a package substrate of the memory devices. 
     
     
         6 . A memory module as claimed in  claim 5  wherein the film resistors are located near solder balls of the package substrate. 
     
     
         7 . A memory module as claimed in  claim 5  wherein the film resistors are located on a surface of the package substrate. 
     
     
         8 . A memory module as claimed in  claim 1  configured for operating at speeds greater than 1 Gb/s. 
     
     
         9 . A memory module as claimed in  claim 1  wherein the film resistors are formed by depositing a resistive material on selected areas. 
     
     
         10 . A memory module as claimed in  claim 1  wherein the film resistors are formed by depositing a resistive material over an area and then etching away unwanted resistive material. 
     
     
         11 . A memory module as claimed in  claim 1  wherein the film resistors are formed by a photolithographic process.