Narrow active cell ie type trench gate igbt and a method for manufacturing a narrow active cell ie type trench gate igbt

Abstract

In an equal width active cell IE type IGBT, a wide active cell IE type IGBT, and the like, an active cell region is equal in trench width to an inactive cell region, or the trench width of the inactive cell region is narrower. Accordingly, it is relatively easy to ensure the breakdown voltage. However, with such a structure, an attempt to enhance the IE effect entails problems such as further complication of the structure. The present invention provides a narrow active cell IE type IGBT having an active cell two-dimensional thinned-out structure, and not having a substrate trench for contact.

What is claimed is: 
     
         1 . A narrow active cell IE type trench gate IGBT comprising:
 (a) a silicon type semiconductor substrate having a first main surface and a second main surface;   (b) an IGBT cell region arranged on the first main surface side of the silicon type semiconductor substrate;   (c) a plurality of linear active cell regions and a plurality of linear inactive cell regions arranged in the IGBT cell region;   (d) a plurality of active sections and a plurality of inactive sections alternately arrayed along the longitudinal direction of the each linear active cell region;   (e) a trench arranged in the first main surface of the silicon type semiconductor substrate, and at a boundary part between the each linear active cell region and the each linear inactive cell region;   (f) a gate electrode arranged in the trench via an insulation film;   (g) an emitter region having a first conductivity type, arranged in a surface region on the first main surface side of the silicon type semiconductor substrate, and over almost the entire region of the each active section;   (h) a body contact region having a second conductivity type, arranged in the surface region on the first main surface side of the silicon type semiconductor substrate, and in the each inactive section; and   (i) a metal emitter electrode arranged over the first main surface of the silicon type semiconductor substrate, and electrically coupled to the emitter region and the body contact region.   
     
     
         2 . The narrow active cell IE type trench gate IGBT according to  claim 1 ,
 wherein the body contact region is arranged over almost the entire region of the each inactive section.   
     
     
         3 . The narrow active cell IE type trench gate IGBT according to  claim 2 , further comprising:
 (j) a second conductivity type floating region arranged in the surface region on the first main surface side of the silicon type semiconductor substrate, and in almost the entire region of the each linear inactive cell region, in such a manner as to extend to the bottom ends of the trenches on the opposite sides thereof.   
     
     
         4 . The narrow active cell IE type trench gate IGBT according to  claim 3 , further comprising:
 (k) a hole barrier region having the first conductivity type, arranged in the surface region on the first main surface side of the silicon type semiconductor substrate, and in almost the entire region of the each linear active cell region, to the same level of depth as that of the bottom ends of the trenches on the opposite sides thereof.   
     
     
         5 . The narrow active cell IE type trench gate IGBT according to  claim 4 , further comprising:
 (m) a buried body contact region having the second conductivity type, arranged in almost the entire surface of the layer underlying the body contact region in such a manner as to be in contact therewith.   
     
     
         6 . The narrow active cell IE type trench gate IGBT according to  claim 5 ,
 wherein the interval between the trenches on the opposite sides of the each linear active cell region is 0.35 micrometer or less.   
     
     
         7 . The narrow active cell IE type trench gate IGBT according to  claim 6 ,
 wherein the width in the longitudinal direction of the each active section is 0.5 micrometer or less.   
     
     
         8 . The narrow active cell IE type trench gate IGBT according to  claim 7 , further comprising:
 (n) a first conductivity type surface floating region arranged in the surface region on the first main surface side of the silicon type semiconductor substrate, and in the each linear inactive region at a position on the extension of the emitter region in the adjacent linear active region.   
     
     
         9 . The narrow active cell IE type trench gate IGBT according to  claim 8 , further comprising:
 (p) a second conductivity type surface floating region arranged in the surface region on the first main surface side of the silicon type semiconductor substrate, and in the each linear inactive region at a position on the extension of the body contact region in the adjacent linear active region.   
     
     
         10 . The narrow active cell IE type trench gate IGBT according to  claim 7 , further comprising:
 (q) a hole collector cell region arranged in such a manner as to alternately substitute for the linear active cell regions.   
     
     
         11 . The narrow active cell IE type trench gate IGBT according to  claim 7 , further comprising:
 (r) a drift region having the first conductivity type, arranged from the inside to the first main surface in almost the entire region of the silicon type semiconductor substrate;   (s) a field stop region arranged on the second main surface side of the drift region in almost the entire region of the silicon type semiconductor substrate, having the first conductivity type, and having a higher concentration than that of the drift region;   (t) a collector region having the second conductivity type, arranged on the second main surface side of the field stop region in almost the entire region of the silicon type semiconductor substrate;   (v) an aluminum doped region arranged on the second main surface side of the collector region in almost the entire region of the silicon type semiconductor substrate, and having a higher concentration than that of the collector region; and   (w) a metal collector electrode arranged in almost the entire region of the second main surface of the silicon type semiconductor substrate,   wherein a portion of the metal collector electrode in contact with the aluminum doped region is a back surface metal film including aluminum as a main component.   
     
     
         12 . A method for manufacturing a narrow active cell IE type trench gate IGBT,
 the IGBT, comprising:   (a) a silicon type semiconductor wafer having a first main surface and a second main surface;   (b) an IGBT cell region arranged on the first main surface side of the silicon type semiconductor wafer;   (c) a drift region having a first conductivity type arranged from the inside to the first main surface in almost the entire region of the silicon type semiconductor wafer;   (d) a body region having a second conductivity type, arranged in the surface region on the first main surface side of the silicon type semiconductor wafer, and in almost the entire surface of the IGBT cell region;   (e) a plurality of linear active cell regions and a plurality of linear inactive cell regions arranged in the IGBT cell region;   (f) a plurality of active sections and a plurality of inactive sections alternately arrayed along the longitudinal direction of the each linear active cell region;   (g) a trench arranged in the first main surface of the silicon type semiconductor wafer, and at the boundary part between the each linear active cell region and the each linear inactive cell region;   (h) a gate electrode arranged in the trench via an insulation film;   (i) an emitter region having the first conductivity type arranged in the surface region of the body region, and over almost the entire region of the each active section;   (j) a body contact region having the second conductivity type, arranged in the surface region of the body region, and in the each inactive section;   (k) a second conductivity type floating region arranged in the surface region on the first main surface side of the silicon type semiconductor wafer, and in almost the entire region of the each linear inactive cell region, in such a manner as to extend to the bottom ends of the trenches on the opposite sides thereof, and having a larger depth than that of the body region; and   (m) a metal emitter electrode arranged over the first main surface of the silicon type semiconductor wafer, and electrically coupled to the emitter region and the body contact region,   the method comprising the steps of:   (x1) introducing second conductivity type impurities for forming the second conductivity type floating region in the first main surface of the silicon type semiconductor wafer;   (x2) after the step (x1), forming the trench;   (x3) after the step (x2), carrying out drive-in diffusion with respect to the impurities introduced in the step (x1);   (x4) after the step (x3), forming the gate electrode; and   (x5) after the step (x4), introducing second conductivity type impurities for forming the body region.   
     
     
         13 . The method for manufacturing a narrow active cell IE type trench gate IGBT according to  claim 12 , further comprising a step of:
 (x6) before the step (x1), introducing first conductivity type impurities for forming a hole barrier region into the first main surface of the silicon type semiconductor wafer.   
     
     
         14 . The method for manufacturing a narrow active cell IE type trench gate IGBT according to  claim 13 ,
 wherein the step (x1) is also used for introducing second conductivity type impurities for forming a floating field ring arranged in the peripheral outside of the IGBT cell region.   
     
     
         15 . The method for manufacturing a narrow active cell IE type trench gate IGBT according to  claim 14 , further comprising a step of:
 (x7) after the step (x5), introducing first conductivity type impurities for forming the emitter region.   
     
     
         16 . The method for manufacturing a narrow active cell IE type trench gate IGBT according to  claim 15 , further comprising a step of:
 (x8) after the step (x7), introducing second conductivity type impurities for forming the body contact region.