US2013328044A1PendingUtilityA1

Manufacturing method of semiconductor device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Jul 3, 2009Filed: Aug 13, 2013Published: Dec 12, 2013
Est. expiryJul 3, 2029(~2.9 yrs left)· nominal 20-yr term from priority
H10P 72/0436H10P 72/0434H10D 30/6755H10D 30/6704H10D 86/60H10D 30/031H10D 86/423H01L 29/7869
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Claims

Abstract

An object is to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, impurities such as moisture existing in the gate insulating layer are reduced before formation of the oxide semiconductor film, and then heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. After that, slow cooling is performed in an oxygen atmosphere. Besides impurities such as moisture existing in the gate insulating layer and the oxide semiconductor film, impurities such as moisture existing at interfaces between the oxide semiconductor film and upper and lower films provided in contact therewith are reduced.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a substrate;   a first gate electrode layer on the substrate;   an oxide semiconductor layer over and overlapping the first gate electrode layer;   a first insulating layer interposed between the oxide semiconductor layer and the first gate electrode layer;   a second gate electrode layer over and overlapping the oxide semiconductor layer and the first gate electrode layer;   a second insulating layer interposed between the oxide semiconductor layer and the second gate electrode layer; and   a source electrode layer and a drain electrode layer each in contact with the oxide semiconductor layer.   
     
     
         3 . A semiconductor device comprising:
 a substrate;   a first gate electrode layer on the substrate;   an oxide semiconductor layer over and overlapping the first gate electrode layer;   a first insulating layer interposed between the oxide semiconductor layer and the first gate electrode layer;   a second gate electrode layer over and overlapping the oxide semiconductor layer and the first gate electrode layer;   a second insulating layer interposed between the oxide semiconductor layer and the second gate electrode layer;   a planarization film between the second insulating layer and the second gate electrode layer; and   a source electrode layer and a drain electrode layer each in contact with the oxide semiconductor layer.   
     
     
         4 . A semiconductor device comprising:
 a substrate;   a first gate electrode layer on the substrate;   an oxide semiconductor layer over and overlapping the first gate electrode layer;   a first insulating layer interposed between the oxide semiconductor layer and the first gate electrode layer;   a second gate electrode layer over and overlapping the oxide semiconductor layer and the first gate electrode layer;   a second insulating layer interposed between the oxide semiconductor layer and the second gate electrode layer;   a source electrode layer and a drain electrode layer each in contact with the oxide semiconductor layer; and   a pixel electrode electrically connected to one of the source electrode layer and the drain electrode layer,   wherein the second gate electrode layer and the pixel electrode are made from a same material.   
     
     
         5 . The semiconductor device according to  claim 4  further comprising:
 a planarization film between the second insulating layer and the second gate electrode layer. 
 
     
     
         6 . The semiconductor device according to  claim 2 ,
 wherein the second gate electrode layer is formed from a transparent conductive film.   
     
     
         7 . The semiconductor device according to  claim 3 ,
 wherein the second gate electrode layer is formed from a transparent conductive film.   
     
     
         8 . The semiconductor device according to  claim 4 ,
 wherein the second gate electrode layer and the pixel electrode are formed from a transparent conductive film.   
     
     
         9 . The semiconductor device according to  claim 2 ,
 wherein the second gate electrode layer is formed from a transparent conductive oxide film.   
     
     
         10 . The semiconductor device according to  claim 3 ,
 wherein the second gate electrode layer is formed from a transparent conductive oxide film.   
     
     
         11 . The semiconductor device according to  claim 4 ,
 wherein the second gate electrode layer and the pixel electrode are formed from a transparent conductive oxide film.   
     
     
         12 . The semiconductor device according to  claim 2 ,
 wherein the first gate electrode layer and the second gate electrode layer are configured to be put a same potential.   
     
     
         13 . The semiconductor device according to  claim 3 ,
 wherein the first gate electrode layer and the second gate electrode layer are configured to be put a same potential.   
     
     
         14 . The semiconductor device according to  claim 4 ,
 wherein the first gate electrode layer and the second gate electrode layer are configured to be put a same potential.   
     
     
         15 . The semiconductor device according to  claim 2 ,
 wherein a top surface and a bottom surface of the oxide semiconductor layer are respectively in direct contact with a first oxide insulating layer and a second oxide insulating layer.   
     
     
         16 . The semiconductor device according to  claim 3 ,
 wherein a top surface and a bottom surface of the oxide semiconductor layer are respectively in direct contact with a first oxide insulating layer and a second oxide insulating layer.   
     
     
         17 . The semiconductor device according to  claim 4 ,
 wherein a top surface and a bottom surface of the oxide semiconductor layer are respectively in direct contact with a first oxide insulating layer and a second oxide insulating layer.   
     
     
         18 . The semiconductor device according to  claim 2 ,
 wherein an average value or a peak value of hydrogen concentration in the oxide semiconductor layer is 3×10 20  cm −3  or less.   
     
     
         19 . The semiconductor device according to  claims 3 ,
 wherein an average value or a peak value of hydrogen concentration in the oxide semiconductor layer is 3×10 20  cm −3  or less.   
     
     
         20 . The semiconductor device according to  claim 4 ,
 wherein an average value or a peak value of hydrogen concentration in the oxide semiconductor layer is 3×10 20  cm −3  or less.   
     
     
         21 . An electronic appliance including the semiconductor device according to  claim 2 . 
     
     
         22 . An electronic appliance including the semiconductor device according to  claim 3 . 
     
     
         23 . An electronic appliance including the semiconductor device according to  claim 4 .

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