Method of fabricating multi-chip stack package structure having inner layer heat-dissipating board

Abstract

An inner-layer heat-dissipating board and a multi-chip stack package structure having the inner-layer heat-dissipating board are disclosed. The inner-layer heat-dissipating board includes a metal board body formed with a plurality of penetrating conductive through holes each comprising a plurality of nano wires and an oxidative block having nano apertures filled with the nano wires. The multi-chip stack package structure includes a first chip and an electronic component respectively disposed on the inner-layer heat-dissipating board to thereby facilitate heat dissipation in the multi-chip stack structure as well as increase the overall package rigidity.

1 - 15 . (canceled) 
     
     
         16 . A method of fabricating a multi-chip stack package structure, comprising the steps of:
 providing an inner-layer heat-dissipating board including a metal board body and a plurality of conductive through holes penetrating the metal board body, each of the conductive through holes including a plurality of nano wires and an oxidative block having a plurality of nano apertures filled with the nano wires; and   disposing a first chip on a first surface of the inner-layer heat-dissipating board, disposing an electronic component on a second surface of the inner-layer heat-dissipating board, the second surface opposing the first surface, and electrically connecting the first chip and the electronic component to the conductive through holes.   
     
     
         17 . The method of  claim 16 , wherein the metal board body is made of aluminum, and the oxidative block is made of aluminum oxide. 
     
     
         18 . The method of  claim 16 , wherein the conductive through holes are made by the steps of:
 forming on a surface of the metal board body a resist layer having a plurality of openings, allowing the openings to expose a portion of the metal board body;   oxidizing the exposed portion of the metal board body to form oxidative blocks;   patterning and etching the oxidative blocks to form the nano apertures in the oxidative blocks;   forming the nano wires in the nano apertures; and   exposing the oxidative blocks and the nano wires from the metal board body, so as to form the conductive through holes.   
     
     
         19 . The method of  claim 18 , further comprising removing the resist layer. 
     
     
         20 . The method of  claim 18 , wherein the step of exposing the oxidative blocks and the nano wires from the metal board body comprises polishing or etching another surface of the metal board body on which the resist layer is not formed, so as to expose the oxidative blocks and the nano wires. 
     
     
         21 . The method of  claim 18 , further comprising forming first bumps on end surfaces of the conductive through holes. 
     
     
         22 . The method of  claim 21 , wherein the first chip and the electronic component are electrically connected to the first bumps through a plurality of second bumps correspondingly. 
     
     
         23 . The method of  claim 16 , wherein the electronic component is a circuit board or a second chip. 
     
     
         24 . The method of  claim 23 , wherein the electronic component is the second chip, and the second chip is disposed on the inner-layer heat-dissipating board via a top surface thereof, and has a bottom surface under which a circuit board is disposed. 
     
     
         25 . The method of  claim 24 , further comprising forming an underfill material between the inner-layer heat-dissipating board and the first chip, between the inner-layer heat-dissipating board and the second chip and between the circuit board and the second chip. 
     
     
         26 . The method of  claim 16 , further comprising stacking another inner-layer heat-dissipating board on a bottom surface of the electronic component.