Semiconductor device having wafer-level chip size package

Abstract

A semiconductor device including a semiconductor substrate with circuit elements and electrode pads formed on one surface. The surface is covered by a dielectric layer with openings above the electrode pads. A metal layer is included on the dielectric layer and patterned to form a conductive pattern with traces leading to the electrode pads. A protective layer is included as having openings exposing part of the conductive pattern. Each opening is covered by an electrode such as a solder bump, which is electrically connected through the conductive pattern to one of the electrode pads. The thickness of the protective layer, which may function as a package of the semiconductor device, is thus reduced. The protective layer may be formed from a photosensitive material, simplifying the formation of the openings for the electrodes.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor substrate having a circuit element formed on a surface of the semiconductor substrate;   an electrode pad formed on the surface of the semiconductor substrate, and electrically coupled to the circuit element;   a first dielectric film formed over the surface of the semiconductor substrate, and having a through hole that extends to the electrode pad;   a conductive pattern, electrically coupled to the electrode pad, extending from the through hole to an upper surface of the first dielectric film;   a second dielectric film covering both the first dielectric film and the conductive pattern;   a conductive nub, electrically coupled to the conductive pattern, extending upwardly from the conductive pattern in the second dielectric film and projecting upwardly from an upper surface of the second dielectric film in a vertical direction perpendicular to the surface of the semiconductor substrate, the conductive nub being formed in an area other than the upper surface of the second dielectric film; and   a bump electrode formed on the conductive nub, covering at least part of the upwardly projected portion of the conductive nub.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the conductive nub is formed in the area other than an upper area that is in the vertical direction above the upper surface of the second dielectric film. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the conductive nub is formed in the area other than an area directly above the electrode pad. 
     
     
         4 . The semiconductor device of  claim 1 , further comprising a metal underlayer disposed between the conductive pattern and the first dielectric film. 
     
     
         5 . The semiconductor device of  claim 1 , further comprising a third dielectric film disposed between the first dielectric film and the surface of the semiconductor substrate. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the second dielectric film is made from a photosensitive resin.