Substrate diode formed by angled ion implantation processes
Abstract
A substrate diode device having an anode and a cathode includes a doped well positioned in a bulk layer of an SOI substrate. A first doped region is positioned in the doped well, the first doped region being for one of the anode or the cathode, the first doped region having a first long axis and a second doped region positioned in the doped well. The second doped region is separate from the first doped region, the second doped region being for the other of the anode or the cathode, the second doped region having a second long axis that is oriented at an orientation angle with respect to the first long axis.
Claims
exact text as granted — not AI-modified1 .- 17 . (canceled)
18 . A substrate diode device having an anode and a cathode, the device comprising:
a doped well positioned in a bulk layer of an SOI substrate; a first doped region positioned in said doped well, said first doped region being for one of said anode or said cathode, said first doped region having a first long axis; and a second doped region positioned in said doped well, said second doped region being separate from said first doped region, said second doped region being for the other of said anode or said cathode, second doped region having a second long axis that is oriented at an orientation angle ranging from 80-100 degrees with respect to said first long axis.
19 . The device of claim 18 , wherein said orientation angle is approximately 90 degrees.
20 . The device of claim 18 , wherein said doped well in an N-doped well, said first doped region is an N+ doped region and said second doped region is a P+ doped region.
21 . The device of claim 18 , wherein said doped well in an N-doped well, said first doped region is a P+ doped region and said second doped region is an N+ doped region.
22 . The device of claim 18 , wherein said first and second doped regions have the same configuration when viewed from above.
23 . The device of claim 18 , wherein said first and second doped regions have different configurations when viewed from above.
24 . The device of claim 22 , wherein said first and second doped regions both have rectangular configurations when viewed from above.
25 . The device of claim 18 , wherein said doped well has a T-shaped configuration when viewed from above.
26 . A substrate diode device, comprising:
an N-doped well positioned in a bulk layer of an SOI substrate; a substantially rectangularly shaped N+ doped region positioned in said N-doped well, said substantially rectangularly shaped N+ doped region having a first long axis; and a substantially rectangularly shaped P+ doped region positioned in said N-doped well, said substantially rectangularly shaped P+ doped region being separated from said N+ doped region and having a second long axis, wherein an orientation angle of said second long axis relative to said first long axis ranges from approximately 80-100 degrees.
27 . The device of claim 26 , wherein said orientation angle is approximately 90 degrees.
28 . The device of claim 26 , wherein N-doped well has a substantially T-shaped configuration when viewed from above.
29 . The device of claim 26 , wherein said N+ doped region is separated from said P+ doped region by a portion of said N-doped well.
30 . The device of claim 26 , wherein said N+ doped region comprises a cathode of said substrate diode and said P+ doped region comprises an anode of said substrate diode.
31 . The device of claim 26 , wherein said substrate diode is positioned adjacent to from a transistor, said transistor being electrically isolated from said substrate diode by a trench isolation structure.
32 . The device of claim 26 , wherein each of said N+ doped region and said P+ doped region comprise a metal silicide contact region.
33 . A substrate diode device, comprising:
an N-doped well positioned in a bulk layer of an SOI substrate, said N-doped well having a substantially T-shaped configuration when viewed from above; an N+ doped region positioned in said N-doped well, said N+ doped region having a first long axis and comprising a cathode of said substrate diode; and a P+ doped region positioned in said N-doped well, said P+ doped region having a second long axis and comprising an anode of said substrate diode, wherein an orientation angle of said second long axis relative to said first long axis is approximately 90 degrees, and wherein said P+ doped regions is separated from said N+ doped region by a portion of said N-doped well.
34 . The device of claim 33 , wherein each of said N+ doped region and said P+ doped region have a substantially rectangular configuration when viewed from above.
35 . The device of claim 33 , wherein a first end of said N+ doped region is positioned adjacent to a substantial mid-point of said P+ doped region, said first end of said N+ doped region being separated from said substantial mid-point of said P+ doped region by said portion of said N-doped well.
36 . The device of claim 33 , wherein a first end of said P+ doped region is positioned adjacent to a substantial mid-point of said N+ doped region, said first end of said P+ doped region being separated from said substantial mid-point of said N+ doped region by said portion of said N-doped well.
37 . The device of claim 33 , further comprising N+ doped halo regions positioned between said N+ doped region and said P+ doped region.Join the waitlist — get patent alerts
Track US2013307112A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.