Timing Controller Capable of Switching Between Graphics Processing Units

Abstract

A display system is disclosed that is capable of switching between graphics processing units (GPUs). Some embodiments may include a display system, including a display, a timing controller (T-CON) coupled to the display, the T-CON including a plurality of receivers, and a plurality of GPUs, where each GPU is coupled to at least one of the plurality of receivers, and where the T-CON selectively couples only one of the plurality of GPUs to the display at a time.

What is claimed is: 
     
         1 . A system, comprising:
 a display;   a host computer;   a plurality of graphics processing units (GPUs), wherein each GPU of the plurality of GPUs is configured to generate a respective one of a plurality of video image signals; and   a timing controller coupled to the host computer and the plurality of GPUs, wherein the timing controller is configured to:
 receive the plurality of video image signals; 
 process each video image signal of the plurality of video image signals; 
 send a first processed video image signal to the display; 
 select a second processed video image signal dependent upon a power consumption of a respective one of the plurality of GPUs; and 
 send the selected second processed video image signal to the display. 
   
     
     
         2 . The system of  claim 1 , wherein each video image signal of the plurality of video image signals includes one or more synchronization signals. 
     
     
         3 . The system of  claim 2 , wherein to process each video image signal of the plurality of video image signals, the timing controller is further configured to determine one or more blanking intervals dependent upon the one or more synchronization signals. 
     
     
         4 . The system of  claim 2 , wherein the one or more synchronization signals include a frame synchronization signal and a lines synchronization signal. 
     
     
         5 . The system of  claim 1 , wherein to process each video image signal of the plurality of video image signals, the timing controller is further configured to translate each video image signal of the plurality of video image signals into a format compatible with the display. 
     
     
         6 . The system of  claim 3 , wherein to send the selected second processed video image signal to the display, the timing controller is further configured to switch between the first processed video image signal and the selected second processed video image signal dependent upon the blanking intervals of the selected second processed video image signal. 
     
     
         7 . The system of  claim 2 , wherein the timing controller includes at least one phase-locked loop (PLL). 
     
     
         8 . A method for processing video data, comprising:
 generating a plurality of video image signals by a respective plurality of graphics processing units (GPUs);   processing each video image signal of the plurality of video image signals;   sending, to a display, a first processed video image signal of the plurality of video image signals;   selecting a second processed video image from the plurality of video image signals dependent upon a power consumption of a respective one of the plurality of GPUs; and   sending the selected second processed video image signal to the display.   
     
     
         9 . The method of  claim 8 , wherein processing each video image signal of the plurality of video image signals comprises translating each video image signal into a format compatible with the display. 
     
     
         10 . The method of  claim 8 , wherein each video signal of the plurality of video image signals includes one or more synchronization signals. 
     
     
         11 . The method of  claim 10 , wherein processing each video image signal of the plurality of video image signals comprises determining one or more blanking intervals for each video image signal dependent upon the included one or more synchronization signals. 
     
     
         12 . The method of  claim 10 , wherein the one or more synchronization signals includes a frame synchronization signal and a line synchronization signal. 
     
     
         13 . The method of  claim 11 , wherein selecting a second processed video image signal comprises switching between the first processed video image signal and the second processed video image signal dependent upon the one or more blanking intervals of the second processed video image signal. 
     
     
         14 . The method of  claim 8 , wherein processing each video image signal of the plurality of video image signals comprises phase-locking a respective plurality of internal signals to the plurality of video image signals. 
     
     
         15 . A timing controller coupled to a plurality of graphics processing units (GPUs), comprising:
 a plurality of receiver units, wherein each receiver unit is configured to receive a respective one of the plurality of video image signals, wherein each video image signal of the plurality of video image signals is generated by a respective one of the plurality of GPUs; and   circuitry configured to:
 process each video image signal of the received plurality of video image signals; 
 send a first processed video image signal to a display; 
 select a second processed video image signal dependent upon a power consumption of a respective one of the plurality of GPUs; and 
 send the selected second processed video image signal to the display. 
   
     
     
         16 . The timing controller of  claim 15 , wherein each receiver of the plurality of receivers includes a phase-locked loop. 
     
     
         17 . The timing controller of  claim 15 , wherein each video image signal of the plurality of video image signals includes one or more synchronization signals. 
     
     
         18 . The timing controller of  claim 17 , wherein to process each video image signal of the plurality of video image signals, the circuitry is further configured to determine one or more blanking intervals for each video image signal of the plurality of video image signals dependent upon the included one or more synchronization signals. 
     
     
         19 . The timing controller of  claim 15 , wherein the one or more synchronization signals include a frame synchronization signal and a line synchronization signal. 
     
     
         20 . The timing controller of  claim 18 , wherein to select a second processed video image, the timing controller is further configured to switch between the first processed video image signal and the selected second processed video image signal dependent upon the blanking intervals of the selected second processed video image signal.