Method and device for generating short pulses
Abstract
There is described a method and corresponding pulse generating device, for generating an output pulse signal having an output pulse duration. The method comprises: receiving at an input port an input pulse signal comprising an input pulse duration; duplicating the input pulse signal into a first digital pulse signal and a second digital pulse signal each comprising the input pulse duration; delaying at least one of the first and the second digital pulse signals by a time delay to obtain respectively a first and a second delayed digital pulse signal, a time delay difference between the first and the second delayed digital pulse signals being substantially equal to the output pulse duration; logically combining the first and the second delayed digital pulse signals to generate the output pulse signal with the output pulse duration smaller than the input pulse duration; and outputting the output pulse signal at an output port.
Claims
exact text as granted — not AI-modified1 . A pulse generating device for generating an output pulse signal having an output pulse duration, the device comprising:
a signal duplicator for receiving an input pulse signal comprising an input pulse duration, the signal duplicator for duplicating the input pulse signal into a first digital pulse signal and a second digital pulse signal each comprising the input pulse duration; a delay component operatively coupled to the signal duplicator, the delay component for delaying at least one of the first and the second digital pulse signals by a time delay to obtain respectively a first and a second delayed digital pulse signal, a time delay difference between the first and the second delayed digital pulse signals being substantially equal to the output pulse duration; and a logic circuit coupled to the delay component, the logic circuit for combining logically the first and the second delayed digital pulse signals to generate the output pulse signal with the output pulse duration smaller than the input pulse duration, the logic circuit for outputting the output pulse signal.
2 . The pulse generating device of claim 1 , wherein the logic circuit is for generating the output pulse signal independently of a voltage value associated with the input pulse signal.
3 . The pulse generating device of claim 1 , comprising a compressor for compressing at least one of pulse edges of the input pulse signal in time, prior to the duplicating.
4 . The pulse generating device of claim 1 , wherein the signal duplicator comprises an analog-to-digital converter to convert the input pulse signal into a digital pulse signal, prior to duplicating the digital pulse signal into the first digital pulse signal and the second digital pulse signal.
5 . The pulse generating device of claim 1 , comprising a pulse generator coupled to the signal duplicator for generating the input pulse signal comprising the input pulse duration, the pulse generator being coupled to the signal duplicator via an input port.
6 . The pulse generating device of claim 1 , wherein the logic circuit comprises at least one of an XOR gate, a NOR gate, an XRN gate and an AND gate.
7 . The pulse generating device of claim 1 , wherein the signal duplicator, the delay component and the logic circuit are integrated within a single circuit device.
8 . The pulse generating device of claim 1 , wherein the delay component comprises an adjustable delay component.
9 . The pulse generating device of claim 1 , wherein the delay component comprises at least two delay components each for respectively delaying the first and the second digital pulse signals by a first and a second time delay respectively, the time delay difference corresponding to a difference between the first and the second time delays.
10 . The pulse generating device of claim 1 , comprising a logical inverter coupled between one of: the signal duplicator and the delay component, and the delay component and the logic circuit, for inverting one of: the first and the second digital pulse signals; and the first and the second delayed digital pulse signals.
11 . The pulse generating device of claim 1 , comprising a phase splitting device coupled to the signal duplicator, the phase splitting device producing complementary input pulse signals and feeding the complementary input pulse signals to the signal duplicator.
12 . The pulse generating device of claim 1 , wherein the logic circuit comprises a differential logic component for inverting the first delayed digital pulse signal and the second delayed digital pulse signal.
13 . A method for generating an output pulse signal having an output pulse duration, the method comprising:
receiving at an input port of an electronic device an input pulse signal comprising an input pulse duration; duplicating the input pulse signal into a first digital pulse signal and a second digital pulse signal each comprising the input pulse duration; delaying at least one of the first and the second digital pulse signals by a time delay to obtain respectively a first and a second delayed digital pulse signal, a time delay difference between the first and the second delayed digital pulse signals being substantially equal to the output pulse duration; logically combining the first and the second delayed digital pulse signals to generate the output pulse signal with the output pulse duration smaller than the input pulse duration; and outputting the output pulse signal at an output port of the electronic device to drive an electronic or electrical circuit.
14 . The method of claim 13 , wherein the logically combining is performed independently of a voltage value associated with the input pulse signal.
15 . The method of claim 13 , wherein the duplicating comprises converting the input pulse signal into a digital pulse signal, the first digital pulse signal and the second digital pulse signal being duplicated from the digital pulse signal.
16 . The method of claim 13 , wherein the duplicating comprises reducing a noise level in the input pulse signal.
17 . The method of claim 13 , comprising generating the input pulse signal comprising the input pulse duration, and sending the input pulse signal to the input port.
18 . The method of claim 13 , comprising compressing at least one of an attack portion and a decay portion of the input pulse signal in time, prior to the duplicating, the attack portion and the decay portion defining pulse edges about a sustain portion of the input pulse signal.
19 . The method of claim 13 , wherein at least one of the logically combining and the outputting comprises logically switching a gate to output the output pulse signal with an output pulse rate corresponding to one of: an input frequency of the input pulse signal and twice the input frequency.
20 . The method of claim 13 , comprising inverting one of: the input pulse signal, the first and the second digital pulse signals; and the first and the second delayed digital pulse signals.Join the waitlist — get patent alerts
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