US2013299982A1PendingUtilityA1

Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die

Assignee: STATS CHIPPAC LTDPriority: Sep 23, 2009Filed: Jul 17, 2013Published: Nov 14, 2013
Est. expirySep 23, 2029(~3.2 yrs left)· nominal 20-yr term from priority
H10W 90/28H10W 74/00H10W 74/142H10W 70/655H10W 70/681H10W 90/297H10W 90/288H10W 72/823H10W 72/884H10W 72/877H10W 72/874H10W 72/856H10W 90/755H10W 72/942H10W 72/29H10W 72/9413H10W 90/00H10W 72/0198H10W 99/00H10W 72/30H10W 72/073H10W 72/07236H10W 72/07231H10W 72/07204H10W 90/724H10W 90/722H10W 72/241H10W 90/732H10P 72/7424H10P 72/74H10W 72/932H10W 42/20H10W 90/701H10W 74/117H10W 74/019H10W 70/635H10W 70/68H10W 74/01H01L 23/49816H01L 21/56
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Claims

Abstract

A semiconductor device has an interposer mounted over a carrier. The interposer includes TSV formed either prior to or after mounting to the carrier. An opening is formed in the interposer. The interposer can have two-level stepped portions with a first vertical conduction path through a first stepped portion and second vertical conduction path through a second stepped portion. A first and second semiconductor die are mounted over the interposer. The second die is disposed within the opening of the interposer. A discrete semiconductor component can be mounted over the interposer. A conductive via can be formed through the second die or encapsulant. An encapsulant is deposited over the first and second die and interposer. A portion of the interposer can be removed to that the encapsulant forms around a side of the semiconductor device. An interconnect structure is formed over the interposer and second die.

Claims

exact text as granted — not AI-modified
What is claimed: 
     
         1 . A method of making a semiconductor device, comprising:
 providing a carrier;   forming an interface layer over the carrier;   disposing a first substrate over the carrier;   disposing a second substrate over the carrier;   disposing a first semiconductor die over the first and second substrates electrically connected to the first and second substrates;   depositing an encapsulant over the first semiconductor die and over the first and second substrates; and   removing the carrier and interface layer.   
     
     
         2 . The method of  claim 1 , further including forming a plurality of bumps over the first and second substrates. 
     
     
         3 . The method of  claim 1 , wherein disposing the first and second substrates includes simultaneously disposing the first and second substrates over the carrier. 
     
     
         4 . The method of  claim 1 , further including forming an electrical connection between the first and second substrates. 
     
     
         5 . The method of  claim 1 , further including forming an interconnect structure over a surface of the first substrate opposite the first semiconductor die. 
     
     
         6 . The method of  claim 1 , further including disposing a second semiconductor die over the first substrate. 
     
     
         7 . A method of making a semiconductor device, comprising:
 providing a first substrate;   disposing a second substrate adjacent to the first substrate;   disposing a first semiconductor die over the first substrate electrically connected to the first substrate; and   depositing an encapsulant over the first semiconductor die and over the first and second substrates.   
     
     
         8 . The method of  claim 7 , further including forming a bump between the first semiconductor die and first substrate. 
     
     
         9 . The method of  claim 7 , further including disposing a passive component over the first or second substrate. 
     
     
         10 . The method of  claim 7 , further including forming an interconnect structure over a surface of the first substrate opposite the first semiconductor die. 
     
     
         11 . The method of  claim 7 , further including forming an electrical connection between the first and second substrates. 
     
     
         12 . The method of  claim 7 , further including forming a bump over a surface of the first substrate opposite the first semiconductor die. 
     
     
         13 . The method of  claim 7 , further including disposing a second semiconductor die over the first semiconductor die. 
     
     
         14 . A semiconductor device, comprising:
 a first substrate;   a second substrate;   a first semiconductor die disposed over the first and second substrates; and   an encapsulant deposited over the first semiconductor die and over the first and second substrates.   
     
     
         15 . The semiconductor device of  claim 14 , further including a bump formed between the first semiconductor die and the second substrate. 
     
     
         16 . The semiconductor device of  claim 14 , wherein the first substrate includes a laminate interposer. 
     
     
         17 . The semiconductor device of  claim 14 , wherein the first substrate includes a coefficient of thermal expansion (CTE) similar to a CTE of the semiconductor die. 
     
     
         18 . The semiconductor device of  claim 14 , wherein the first semiconductor die includes a ball grid array. 
     
     
         19 . The semiconductor device of  claim 14 , further including a second semiconductor die disposed over the first substrate. 
     
     
         20 . A semiconductor device, comprising:
 a first substrate;   a second substrate; and   a first semiconductor die disposed over the first and second substrates and electrically connected to the first and second substrates.   
     
     
         21 . The semiconductor device of  claim 20 , further including a second semiconductor die disposed over the first substrate. 
     
     
         22 . The semiconductor device of  claim 20 , wherein the first substrate includes a laminate interposer. 
     
     
         23 . The semiconductor device of  claim 20 , wherein the second substrate includes an insulating layer and a conductive layer. 
     
     
         24 . The semiconductor device of  claim 20 , wherein the first substrate includes a coefficient of thermal expansion (CTE) similar to a CTE of the semiconductor die. 
     
     
         25 . The semiconductor device of  claim 20 , further including a passive component disposed over the first substrate.

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