US2013299902A1PendingUtilityA1

Formation method and structure for a well-controlled metallic source/drain semiconductor device

Assignee: IBMPriority: Jul 19, 2010Filed: Jul 16, 2013Published: Nov 14, 2013
Est. expiryJul 19, 2030(~4 yrs left)· nominal 20-yr term from priority
H10D 30/0323H10D 30/024H10D 64/015H10D 30/0212H10D 64/647H01L 29/7839
49
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Claims

Abstract

A device and method for forming a semiconductor device include growing a raised semiconductor region on a channel layer adjacent to a gate structure. A space is formed between the raised semiconductor region and the gate structure. A metal layer is deposited on at least the raised semiconductor region. The raised semiconductor region is silicided to form a silicide into the channel layer which extends deeper into the channel layer at a position corresponding to the space.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a semiconductor substrate;   a gate structure formed on the substrate;   reservoir material formed on the substrate adjacent to the gate structure; and   silicided source and drain regions formed adjacent to the gate structure, the silicided source and drain regions having a mounded shape as a result of siliciding the reservoir material wherein the siliciding is controlled such that the silicided regions do not connect below the gate structure.   
     
     
         2 . The device as recited in  claim 1 , wherein the reservoir material includes a raised semiconductor region formed on the substrate by epitaxial growth. 
     
     
         3 . The device as recited in  claim 2 , wherein the raised semiconductor region includes a faceted raised semiconductor region wherein a facet is formed adjacent to the gate structure to enable deeper silicide growth near the gate structure. 
     
     
         4 . The device as recited in  claim 1 , wherein the silicided source and drain regions include at least one of Ni, Co, Ti and W. 
     
     
         5 . The device as recited in  claim 1 , wherein the reservoir material and the gate structure include a space therebetween. 
     
     
         6 . The device as recited in  claim 1 , wherein the substrate includes a channel layer and a buried insulator layer. 
     
     
         7 . The device as recited in  claim 6 , wherein silicided source and drain regions extend down to the insulator layer. 
     
     
         8 . A semiconductor device, comprising:
 a semiconductor substrate;   a gate structure formed on the substrate;   reservoir material formed on the substrate adjacent to the gate structure; and   silicided source and drain regions formed adjacent to the gate structure, the silicided source and drain regions having a mounded shape as a result of siliciding the reservoir material wherein the siliciding is controlled such that the silicided regions do not connect below the gate structure, and further wherein the silicided regions are formed to an underlying layer.

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