Semiconductor device and method of manufacturing the same

Abstract

A semiconductor device includes a gate metal buried within a trench included in a semiconductor substrate including an active region defined by an isolation layer, a spacer pattern disposed on an upper portion of a sidewall of a gate metal, a first gate oxide layer disposed between the spacer pattern and the trench, a second gate oxide layer disposed below the first gate oxide layer and the gate metal, and a junction region disposed in the active region to overlap the first gate oxide layer.

1 .- 11 . (canceled) 
     
     
         12 . A semiconductor device, comprising:
 a gate metal buried within a trench formed in a semiconductor substrate, the semiconductor including an active region defined by a device isolation layer;   a spacer pattern formed over an upper portion of the gate metal and extending upward from a sidewall of the gate metal;   a first gate oxide layer disposed between the spacer pattern and a sidewall of the trench;   a second gate oxide layer extending from the bottom of the first gate oxide layer to be formed under the gate metal; and   a junction region formed at a side of the gate metal while having the first gate oxide layer interposed therebetween.   
     
     
         13 . The semiconductor device of  claim 12 , wherein the first gate oxide layer has a thicker thickness than the second gate oxide layer. 
     
     
         14 . The semiconductor device of  claim 12 , wherein the first gate oxide layer has the thickness of 70 Å to 100 Å. 
     
     
         15 . The semiconductor device of  claim 12 , wherein the second oxide layer has a thickness of 50 Å to 60 Å. 
     
     
         16 . The semiconductor device of  claim 12 , wherein the junction region and the gate metal is spaced apart by the spacer pattern and the first gate oxide layer. 
     
     
         17 . A semiconductor device, comprising:
 a first buried gate formed at a first level in a substrate;   a second buried gate extending from the first buried gate and formed at a second level in the substrate, the second level being higher than the first level;   a junction region formed at a side of the second buried gate at the second level;   a spacer pattern formed between the junction region and the second buried gate at the second level; and   a first gate oxide layer formed between the spacer pattern and the junction region,   wherein a thickness and a material of the spacer pattern and the first gate oxide layer are configured to inhibit leakage between the buried gate and the junction region.   
     
     
         18 . The semiconductor device of  claim 17 , the device further comprising a second gate oxide layer formed between the first buried gate and the substrate,
 wherein the first gate oxide layer is formed to be thicker than the second gate oxide layer.