Memory system and server system

Abstract

According to one embodiment, a memory system includes a NAND flash memory includes a memory cell array includes pages, and a volatile data register with a storage capacity of one page, and configured to write page data to the memory cell array through the data register, each of the pages includes nonvolatile memory cells and being a unit of data write, a volatile RAM, and a controller includes a power saving mode in which power consumption of the RAM is reduced, and configured to transfer data of the RAM to the data register before entering the power saving mode.

1 - 20 . (canceled) 
     
     
         21 . A memory system comprising:
 a non-volatile memory comprising a memory cell array and a data register, and configured to write data to the memory cell array through the data register;   a volatile RAM; and   a controller configured to transfer data of the RAM to the data register without causing the non-volatile memory to store data in the memory cell array, and to transfer data of the data register to the RAM.   
     
     
         22 . The system according to  claim 21 , wherein
 the controller transfers data of the RAM to the data register before entering a power saving mode in which power consumption of the RAM is reduced.   
     
     
         23 . The system of  claim 22 , wherein
 the controller transfers data of the data register to the RAM when the controller exits from the power saving mode.   
     
     
         24 . The system of  claim 22 , wherein
 the RAM stores management information used to manage a state of the non-volatile memory, and   the controller transfers the management information stored in the RAM to the data register before entering the power saving mode.   
     
     
         25 . The system of  claim 22 , further comprising a power supply circuit configured to generate a first voltage and a second voltage,
 wherein the first voltage is applied to the non-volatile memory, and   the second voltage is applied to the RAM through the controller.   
     
     
         26 . The system of  claim 22 , wherein
 the controller turns off a power supply to the RAM during the power saving mode.   
     
     
         27 . The system of  claim 21 , wherein
 the non-volatile memory is a NAND flash memory,   the data register has a storage capacity of at least one page data, and   the one page data is a unit of data write of the NAND flash memory.   
     
     
         28 . A memory system comprising:
 a non-volatile memory comprising a memory cell array and a data register with a storage capacity of at least y unit data (y is an integer greater than 1), and configured to write data to the memory cell array through the data register, the unit data being a unit of data write of the non-volatile memory and each memory cell configured to store y bits;   a volatile RAM; and   a controller configured to transfer data of the RAM to the data register without causing the non-volatile memory to store data in the memory cell array, and to transfer data of the data register to the RAM.   
     
     
         29 . The system according to  claim 28 , wherein
 the controller transfers data of the RAM to the data register before entering a power saving mode in which power consumption of the RAM is reduced.   
     
     
         30 . The system of  claim 28 , wherein
 the data register includes a first register having a storage capacity of y unit data, and a second register having a storage capacity of one unit data and functioning as a buffer.   
     
     
         31 . The system of  claim 29 , wherein
 the controller transfers data of the data register to the RAM when the controller exits from the power saving mode.   
     
     
         32 . The system of  claim 29 , wherein
 the RAM stores management information used to manage a state of the non-volatile memory, and   the controller transfers the management information stored in the RAM to the data register before entering the power saving mode.   
     
     
         33 . The system of  claim 29 , further comprising a power supply circuit configured to generate a first voltage and a second voltage,
 wherein the first voltage is applied to the non-volatile memory, and   the second voltage is applied to the RAM through the controller.   
     
     
         34 . The system of  claim 29 , wherein
 the controller turns off a power supply to the RAM during the power saving mode.   
     
     
         35 . The system of  claim 28 , wherein
 the non-volatile memory is a NAND flash memory, and   the unit data is a unit of data write of the NAND flash memory.   
     
     
         36 . A server system comprising:
 a non-volatile memory comprising a memory cell array and a data register, and configured to write data to the memory cell array through the data register,   a volatile RAM;   a controller configured to transfer data of the RAM to the data register without causing the non-volatile memory to store data in the memory cell array, and to transfer data of the data register to the RAM; and   a capacitor configured to apply a voltage when the controller transfers data of the RAM to the data register.   
     
     
         37 . The system of  claim 36 , wherein
 the controller transfers data of RAM to the data register when a power supply abnormally is turned off.   
     
     
         38 . The system of  claim 37 , wherein
 the controller transfers data of the data register to the RAM when the power supply recovers.   
     
     
         39 . The system of  claim 37 , further comprising a voltage regulator configured to receive external power supply, and to apply a voltage to the controller and the capacitor. 
     
     
         40 . The system of  claim 37 , wherein
 the RAM stores management information used to manage a state of the non-volatile memory, and   the controller transfers the management information stored in the RAM to the data register when the power supply abnormally is turned off.