Generating a power model for an electronic device
Abstract
A method of fabricating a semiconductor device generates a power model for an electronic device. The method includes receiving a data file including design information corresponding to the semiconductor device. The method further includes fabricating the semiconductor device according to the design information, where the semiconductor device includes a processor configured to identify a subset of operating parameters of the electronic device that contribute most to power consumption of the electronic device by reducing training data. The processor is further configured to generate a power model for the electronic device based on the reduced training data. The power model is operable to predict, responsive to a set of operating parameter values corresponding to operation of the electronic device, a power consumption value corresponding to the electronic device.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method comprising:
receiving design information representing at least one physical property of a semiconductor device, the semiconductor device comprising a processor configured to:
identify a subset of operating parameters of an electronic device that contributes most to power consumption of the electronic device by reducing training data; and
generate a power model for the electronic device based on the reduced training data, wherein the power model is operable to predict, responsive to a set of operating parameter values corresponding to operation of the electronic device, a power consumption value corresponding to the electronic device;
transforming the design information to comply with a file format; and generating a data file including the transformed design information.
2 . The method of claim 1 , wherein the data file includes a GDSII format.
3 . The method of claim 1 , wherein the processor generates the power model by performing a multivariable adaptive regression splines operation.
4 . The method of claim 1 , wherein the processor is further configured to verify the generated power model, wherein verifying the generated power model comprises:
performing a factor analysis of the training data to identify a plurality of influencers prior to generating the power model; and comparing basis functions of the generated power model to the identified plurality of influencers.
5 . The method of claim 1 , wherein the power model excludes processor on-chip memory accesses and excludes processor instruction branching performance.
6 . The method of claim 1 , wherein the electronic device comprises an electrical interface.
7 . The method of claim 1 , wherein the processor is further configured to establish a design of experiments to generate a second power model for a second electronic device, the design of experiments specifying a method of collecting training data for the second electronic device, the training data for the second electronic device comprising a plurality of operating parameter values and corresponding power consumption values for the second electronic device.
8 . A method comprising:
receiving a data file comprising design information corresponding to a semiconductor device; and fabricating the semiconductor device according to the design information, wherein the semiconductor device comprises a processor configured to:
identify a subset of operating parameters of an electronic device that contribute most to power consumption of the electronic device by reducing training data; and
generate a power model for the electronic device based on the reduced training data, wherein the power model is operable to predict, responsive to a set of operating parameter values corresponding to operation of the electronic device, a power consumption value corresponding to the electronic device.
9 . The method of claim 8 , wherein the data file has a GDSII format.
10 . The method of claim 8 , wherein the processor generates the power model by performing a multivariable adaptive regression splines operation.
11 . The method of claim 8 , wherein the processor is further configured to verify the generated power model, wherein verifying the generated power model comprises:
performing a factor analysis of the training data to identify a plurality of influencers prior to generating the power model; and comparing basis functions of the generated power model to the identified plurality of influencers.
12 . The method of claim 8 , wherein the processor is further configured to establish a design of experiments to generate a second power model for a second electronic device, the design of experiments specifying a method of collecting training data for the second electronic device, the training data for the second electronic device comprising a plurality of operating parameter values and corresponding power consumption values for the second electronic device.
13 . The method of claim 8 , further comprising integrating the semiconductor device into at least one of a set top box, a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, or a computer.
14 . A method comprising:
receiving design information comprising physical positioning information of a packaged semiconductor device on a circuit board, the packaged semiconductor device comprising:
a power management circuit configured to manage power in an electronic device in accordance with a power model generated based on reduced training data, wherein the power model is operable to predict, responsive to a set of operating parameter values corresponding to operation of the electronic device, a power consumption value corresponding to the electronic device, and wherein the reduced training data is generated by identifying a subset of operating parameters of the electronic device that contribute most to power consumption of the electronic device; and
transforming the design information to generate a data file.
15 . The method of claim 14 , wherein the data file has a GERBER format.
16 . The method of claim 14 , wherein the power management circuit is configured to set at least one operating parameter value in accordance with the power model to dynamically manage power consumption of the electronic device in real-time.
17 . A method comprising:
receiving a data file comprising design information comprising physical positioning information of a packaged semiconductor device on a circuit board; and manufacturing the circuit hoard configure(to receive the packaged semiconductor device according to the design information, wherein the packaged semiconductor device comprises:
a power management circuit configured to manage power in an electronic device in accordance with a power model generated based on reduced training data, wherein the power model is operable to predict, responsive to a set of operating parameter values corresponding to operation of the electronic device, a power consumption value corresponding to the electronic device, and wherein the reduced training data is generated by identifying a subset of operating parameters of the electronic device that contribute most to power consumption of the electronic device.
18 . The method of claim 17 , wherein the data file has a GERBER format.
19 . The method of claim 17 , wherein the power management circuit is configured to set at least one operating parameter value in accordance with the power model to dynamically manage power consumption of the electronic device.
20 . The method of claim 17 , further comprising integrating the circuit board into at least one of: a set top box, a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, or a computer.Join the waitlist — get patent alerts
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