US2013234124A1PendingUtilityA1

Thin-film transistor substrate, method of manufacturing the same, and display device including the same

Assignee: SAMSUNG DISPLAY CO LTDPriority: Feb 19, 2010Filed: Apr 26, 2013Published: Sep 12, 2013
Est. expiryFeb 19, 2030(~3.6 yrs left)· nominal 20-yr term from priority
H10D 30/6756H10D 86/0231H10D 86/423H10D 86/60H10D 86/40H10K 59/1213G02F 1/1343H10K 59/123H10K 59/805H10K 50/805H01L 29/78693H01L 51/5203
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Claims

Abstract

Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A thin-film transistor (TFT) substrate comprising:
 a gate electrode formed on a substrate;   a gate insulating layer formed on the gate electrode;   an oxide semiconductor pattern formed on the gate insulating layer;   a source electrode formed on the oxide semiconductor pattern;   a drain electrode formed on the oxide semiconductor pattern, the drain electrode facing the source electrode; and   a pixel electrode formed on the gate insulating layer.   
     
     
         2 . The TFT substrate of  claim 1 , wherein the pixel electrode extends from the oxide semiconductor pattern. 
     
     
         3 . The TFT substrate of  claim 1 , further comprising a passivation film formed on the source electrode and the drain electrode, the passivation film exposing the pixel electrode. 
     
     
         4 . The TFT substrate of  claim 1 , wherein the pixel electrode and the oxide semiconductor pattern are made of a same material and the pixel electrode is plasma-treated. 
     
     
         5 . The TFT substrate of  claim 4 , wherein the pixel electrode is plasma-treated with a hydrogen-containing gas. 
     
     
         6 . The TFT substrate of  claim 1 , further comprising one or more oxide semiconductor protection film patterns formed between the source and drain electrodes and the oxide semiconductor pattern. 
     
     
         7 . The TFT substrate of  claim 1 , wherein a side of the oxide semiconductor pattern and the source electrode share an etched surface. 
     
     
         8 . The TFT substrate of  claim 6 , wherein the one or more oxide semiconductor protection film patterns each have a contact region which is plasma-treated with a hydrogen-containing gas. 
     
     
         9 . The TFT substrate of  claim 8 , wherein the contact regions of the one or more oxide semiconductor protection film patterns electrically connect the pixel electrode and the drain electrode. 
     
     
         10 . A display device comprising:
 a TFT substrate comprising a gate electrode fanned on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern, the drain electrode is spaced apart from the source electrode, and a pixel electrode formed on the gate insulating layer and extending from the oxide semiconductor pattern; and   a common electrode facing the pixel electrode.   
     
     
         11 . The display device of  claim 10 , further comprising an organic light-emitting layer formed between the common electrode and the pixel electrode. 
     
     
         12 . The display device of  claim 10 , further comprising:
 an opposite substrate comprising the common electrode, the opposite substrate facing the TFT substrate; and   a liquid crystal layer interposed between the TFT substrate and the opposite substrate.   
     
     
         13 . The TFT substrate of  claim 1 , wherein the pixel electrode is spaced apart from the oxide semiconductor pattern. 
     
     
         14 . The TFT substrate of  claim 13 , wherein the pixel electrode contacts the drain electrode and wherein an upper surface of the pixel electrode contacts a lower surface of the drain electrode.

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