Light emitting diode

Abstract

A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, an interlayer, an electron barrier layer, a first and a second electrodes are provided. The active layer is located between the n-type and p-type semiconductor layers, and includes multiple quantum barrier layers and quantum wells located between any two quantum barrier layers. A lattice constant of the quantum barrier layer closest to the p-type semiconductor layer is a 1 . The interlayer is located between and in contact with the active layer and the p-type semiconductor layer, wherein a lattice constant of the interlayer is a 2 . The electron barrier layer is located between the interlayer and the p-type semiconductor layer, wherein a lattice constant of the electron barrier layer is a 3 , and a 2 is not equal to a 1 or a 3 . The first and second electrodes are respectively located on the n-type and p-type semiconductor layers.

1 . A light emitting diode, comprising:
 a substrate;   an n-type semiconductor layer and a p-type semiconductor layer, wherein the n-type semiconductor layer is located between the substrate and the p-type semiconductor layer;   an active layer, located between the n-type semiconductor layer and the p-type semiconductor layer, wherein a wavelength of light emitted by the active layer is λ, 222 nm≦λ≦405 nm, the active layer comprises i quantum barrier layers and (i−1) quantum wells, each of the quantum wells is located between any two of the quantum barrier layers, where i is a natural number greater than or equal to 2, and a lattice constant of the quantum barrier layer closest to the p-type semiconductor layer among the quantum barrier layers is a 1 ;   an interlayer, located between the active layer and the p-type semiconductor layer, and in contact with the quantum barrier layer closest to the p-type semiconductor layer, wherein a lattice constant of the interlayer is a 2 ;   an electron barrier layer, located between the interlayer and the p-type semiconductor layer, and in contact with the interlayer and the p-type semiconductor layer, wherein a lattice constant of the electron barrier layer is a 3 , and a 2  is not equal to a 1  and a 3 ; and   a first electrode and a second electrode, wherein the first electrode is located on a portion of the n-type semiconductor layer, and the second electrode is located on a portion of the p-type semiconductor layer.   
     
     
         2 . The light emitting diode as claimed in  claim 1 , wherein a thickness of the interlayer is t 2 , and a thickness of the electron barrier layer is t 3 , and t 2 ≦0.9 t 3 . 
     
     
         3 . The light emitting diode as claimed in  claim 1 , wherein the lattice constant of the interlayer a, is greater than the lattice constant of the electron barrier layer a 3 . 
     
     
         4 . The light emitting diode as claimed in  claim 3 , wherein the lattice constant of the interlayer a 2  is greater than the lattice constant of the quantum barrier layer closest to the p-type semiconductor layer a 1 . 
     
     
         5 . The light emitting diode as claimed in  claim 1 , wherein a material of the quantum barrier layers, the electron barrier layer and the interlayer comprise nitride semiconductor including aluminium, and an aluminium concentration of the interlayer is not equal to an aluminium concentration of the quantum barrier layers, and is not equal to an aluminium concentration of the electron barrier layer. 
     
     
         6 . The light emitting diode as claimed in  claim 5 , wherein the aluminium concentration of the interlayer is graded from the aluminium concentration of the quantum barrier layer closest to the p-type semiconductor layer to the aluminium concentration of the electron barrier layer, and the electron barrier layer is adjacent to a region with the highest aluminium concentration in the interlayer. 
     
     
         7 . The light emitting diode as claimed in  claim 1 , wherein a variation rate of the lattice constant of the interlayer varied with the thickness of the interlayer is greater than or equal to 9×10 −4  (%/Å). 
     
     
         8 . The light emitting diode as claimed in  claim 1 , wherein the interlayer comprises a polarization field reversal interlayer, a material of the electron barrier layer comprises nitride semiconductor including aluminium, and the electron barrier layer comprises stacked layers derived from a first sub electron barrier layer and a second sub electron barrier layer as one repeating unit, wherein the first sub electron barrier layer is in contact with the polarization field reversal interlayer, and the aluminium concentration of the first sub electron barrier layers is different from an aluminium concentration of the second sub electron barrier layers. 
     
     
         9 . The light emitting diode as claimed in  claim 8 , wherein a material of the polarization field reversal interlayer comprises gallium nitride, and the quantum barrier layers comprise nitride semiconductor including aluminium. 
     
     
         10 . A light emitting diode, comprising:
 a carrier substrate;   a reflective layer and a bonding layer, stacked on the carrier substrate, wherein the bonding layer is located between the carrier substrate and the reflective layer;   an n-type semiconductor layer and a p-type semiconductor layer, wherein the p-type semiconductor layer is located on the reflective layer, and is located between the reflective layer and the n-type semiconductor layer;   an active layer, located between the n-type semiconductor layer and the p-type semiconductor layer, wherein a wavelength of light emitted by the active layer is X, 222 nm≦λ≦405 nm, the active layer comprises i quantum barrier layers and (i−1) quantum wells, each of the quantum wells is located between any two of the quantum barrier layers, where i is a natural number greater than or equal to 2, and a lattice constant of the quantum barrier layer closest to the p-type semiconductor layer among the quantum barrier layers is a 1 ;   an interlayer, located between the active layer and the p-type semiconductor layer, and in contact with the quantum barrier layer closest to the p-type semiconductor layer, wherein a lattice constant of the interlayer is a 2 ;   an electron barrier layer, located between the interlayer and the p-type semiconductor layer, and in contact with the interlayer and the p-type semiconductor layer, wherein a lattice constant of the electron barrier layer is a 3 , and a 2  is not equal to a 1  and a 3 ; and   a contact layer, located on the n-type semiconductor layer.   
     
     
         11 . A light emitting diode, comprising:
 a substrate, an n-type semiconductor layer and a carrier substrate, wherein the n-type semiconductor layer is located between the substrate and the carrier substrate;   a first stacked layer, located between the n-type semiconductor layer and the carrier substrate, and the first stacked layer comprising:
 an active layer, located on the n-type semiconductor layer, wherein a wavelength of light emitted by the active layer is λ, 222 nm≦λ≦405 nm, the active layer comprises i quantum barrier layers and (i−1) quantum wells, each of the quantum wells is located between any two of the quantum barrier layers, where is a natural number greater than or equal to 2; 
 a p-type semiconductor layer, wherein the active layer is located between the n-type semiconductor layer and the p-type semiconductor layer, and a lattice constant of the quantum barrier layer closest to the p-type semiconductor layer among the quantum barrier layers is a 1 ; 
 an interlayer, located between the active layer and the p-type semiconductor layer, and in contact with the quantum barrier layer closest to the p-type semiconductor layer, wherein a lattice constant of the interlayer is a 2 ; 
 an electron barrier layer, located between the interlayer and the p-type semiconductor layer, and in contact with the interlayer and the p-type semiconductor layer, wherein a lattice constant of the electron barrier layer is a 3 , and a 2  is not equal to a 1  and a 3 ; and 
 a contact layer and a bonding layer, wherein the contact layer is located between the p-type semiconductor layer and the bonding layer; 
   a second stacked layer, located between the n-type semiconductor layer and the carrier substrate, and separated away from the first stacked layer by a distance, and the second stacked layer comprising:
 a contact layer and a bonding layer, wherein the bonding layer is located between the contact layer and the carrier substrate.