US2013227230A1PendingUtilityA1

Semiconductor memory, memory system, and method of controlling the same

Assignee: SK HYNIX INCPriority: Oct 29, 2009Filed: Apr 3, 2013Published: Aug 29, 2013
Est. expiryOct 29, 2029(~3.3 yrs left)· nominal 20-yr term from priority
Inventors:Sang Sic Yoon
G11C 8/12G06F 12/00G11C 7/00G06F 13/1668G11C 7/10G06F 3/0659G11C 8/18
47
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Claims

Abstract

Various embodiments of a semiconductor system, a semiconductor memory, and a method of controlling the same are disclosed. In one exemplary embodiment, the semiconductor memory may include a first circuit area configured to perform an operation corresponding to a general operation command and a second circuit area configured to provide the general operation command to the first circuit area. The second circuit area may be configured to determine whether the semiconductor memory is selected to perform the operation based on unique identification information and target identification information allocated to the semiconductor memory.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of controlling a memory system comprising a plurality of semiconductor memories, the method comprising:
 generating an identification information store command and allocating unique identification information to the plurality of semiconductor memories; and   commonly providing a preset operation command to the plurality of semiconductor memories, and selecting one or more of the semiconductor memories using an address signal generated in accordance with the preset operation command.   
     
     
         2 . The method according to  claim 1 , wherein allocating the unique identification information comprises transferring the unique identification information to the plurality of semiconductor memories through data channels individually connected to the respective semiconductor memories. 
     
     
         3 . The method according to  claim 1 , wherein selecting one or more of the semiconductor memories comprises:
 transferring the address signal containing target identification information to the plurality of semiconductor memories; and   at each of the semiconductor memories, checking whether or not the unique identification information of the semiconductor memory is designated in the target identification information.   
     
     
         4 . The method according to  claim 1 , wherein the preset operation command uses some of all bits of the address signal.

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